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Stereo DAC. CS4340 Datasheet

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Stereo DAC. CS4340 Datasheet
















CS4340 DAC. Datasheet pdf. Equivalent













Part

CS4340

Description

Stereo DAC



Feature


CS4340 24-Bit, 96 kHz Stereo D/A Conver ter for Audio Features ! 101 dB Dynami c Range ! -91 dB THD+N ! +3.0 V or +5.0 V Power Supply ! Low Clock Jitter Sens itivity ! Filtered Line-level Outputs ! On-chip Digital De-emphasis for 32, 44 .1 and 48 kHz ! 33 mW with 3V Supply ! Popguard® Technology for Control of Cl icks and Pops ! Lead-free Packaging Ava ilable Description .
Manufacture

Cirrus Logic

Datasheet
Download CS4340 Datasheet


Cirrus Logic CS4340

CS4340; The CS4340 is a complete stereo digital- to-analog system including digital inte rpolation, fourth-order delta-sigma dig - I ital-to-analog conversion, digital de-emphasis and switched capacitor ana log filtering. The advantages of this a rchitecture include: ideal differential linearity, no distortion mechanisms du e to resistor matching errors, no linea rity drift over ti.


Cirrus Logic CS4340

me and temperature and a high tolerance to clock jitter. The CS4340 accepts dat a at audio sample rates from 4 kHz to 1 00 kHz, consumes very little power, and operates over a wide power supply rang e. The features of the CS4340 are ideal for DVD players, CD players, set-top b ox and automotive systems. ORDERING IN FORMATION CS4340-DSZ 16-pin SOIC, Lead Free, -40 to 85 °.


Cirrus Logic CS4340

C CS4340-KS 16-pin SOIC -10 to 70 °C CS4340-KSZ 16-pin SOIC, Lead Free, -10 to 70 °C CS4340-CZZ 16-pin TSSOP, Le ad Free, -10 to 70 °C CDB4340 Evaluat ion Board SCLK/DEM1 RST LRCK SDATA S erial Input Interface DEM0 MUTEC De- emphasis Interpolation Filter External Mute Control ∆Σ DAC Analog Filter Interpolation Filter ∆Σ DAC Anal og Filter AOUTL AOUTR DIF.





Part

CS4340

Description

Stereo DAC



Feature


CS4340 24-Bit, 96 kHz Stereo D/A Conver ter for Audio Features ! 101 dB Dynami c Range ! -91 dB THD+N ! +3.0 V or +5.0 V Power Supply ! Low Clock Jitter Sens itivity ! Filtered Line-level Outputs ! On-chip Digital De-emphasis for 32, 44 .1 and 48 kHz ! 33 mW with 3V Supply ! Popguard® Technology for Control of Cl icks and Pops ! Lead-free Packaging Ava ilable Description .
Manufacture

Cirrus Logic

Datasheet
Download CS4340 Datasheet




 CS4340
CS4340
24-Bit, 96 kHz Stereo D/A Converter for Audio
Features
! 101 dB Dynamic Range
! -91 dB THD+N
! +3.0 V or +5.0 V Power Supply
! Low Clock Jitter Sensitivity
! Filtered Line-level Outputs
! On-chip Digital De-emphasis for 32, 44.1 and
48 kHz
! 33 mW with 3V Supply
! Popguard® Technology for Control of Clicks
and Pops
! Lead-free Packaging Available
Description
The CS4340 is a complete stereo digital-to-analog system
including digital interpolation, fourth-order delta-sigma dig-
I
ital-to-analog conversion, digital de-emphasis and
switched capacitor analog filtering. The advantages of this
architecture include: ideal differential linearity, no distor-
tion mechanisms due to resistor matching errors, no
linearity drift over time and temperature and a high toler-
ance to clock jitter.
The CS4340 accepts data at audio sample rates from
4 kHz to 100 kHz, consumes very little power, and oper-
ates over a wide power supply range. The features of the
CS4340 are ideal for DVD players, CD players, set-top box
and automotive systems.
ORDERING INFORMATION
CS4340-DSZ 16-pin SOIC, Lead Free, -40 to 85 °C
CS4340-KS 16-pin SOIC
-10 to 70 °C
CS4340-KSZ 16-pin SOIC, Lead Free, -10 to 70 °C
CS4340-CZZ 16-pin TSSOP, Lead Free, -10 to 70 °C
CDB4340 Evaluation Board
SCLK/DEM1
RST
LRCK
SDATA
Serial
Input
Interface
DEM0
MUTEC
De-emphasis
Interpolation
Filter
External
Mute Control
∆Σ DAC
Analog Filter
Interpolation
Filter
∆Σ DAC
Analog Filter
AOUTL
AOUTR
DIF0 DIF1
MCLK
www.cirrus.com
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
JULY '05
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 CS4340
CS4340
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ..................................................................................... 4
SPECIFIED OPERATING CONDITIONS .............................................................................................. 4
ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 4
ANALOG CHARACTERISTICS (CS4340-KS/KSZ/CZZ)....................................................................... 5
ANALOG CHARACTERISTICS (CS4340-DSZ) .................................................................................... 7
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE........................................ 8
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE........................................................ 11
SWITCHING CHARACTERISTICS - INTERNAL SERIAL CLOCK ..................................................... 12
DC ELECTRICAL CHARACTERISTICS.............................................................................................. 13
DIGITAL INPUT CHARACTERISTICS ................................................................................................ 13
DIGITAL INTERFACE SPECIFICATIONS........................................................................................... 13
2. PIN DESCRIPTION .............................................................................................................................. 14
3. TYPICAL CONNECTION DIAGRAM ................................................................................................. 15
4. APPLICATIONS ................................................................................................................................... 16
4.1 Sample Rate Range/Operational Mode ........................................................................................ 16
4.2 System Clocking ........................................................................................................................... 16
4.2.1 Internal Serial Clock Mode ............................................................................................... 16
4.2.2 External Serial Clock Mode .............................................................................................. 17
4.3 Digital Interface Format ................................................................................................................. 17
4.4 De-Emphasis ................................................................................................................................ 18
4.5 Power-up Sequence .................................................................................................................... 19
4.6 Popguard® Transient Control ........................................................................................................ 19
4.6.1 Power-up .......................................................................................................................... 19
4.6.2 Power-down ..................................................................................................................... 19
4.6.3 Discharge Time ................................................................................................................ 19
4.7 Mute Control ................................................................................................................................. 20
4.8 Grounding and Power Supply Arrangements ............................................................................... 20
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to www.cirrus.com
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives con-
sent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent
does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
ERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE
IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DE-
VICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD
TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED
IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICA-
TIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER
AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH
THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks
or service marks of their respective owners.
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 CS4340
CS4340
5. PARAMETER DEFINITIONS ................................................................................................................21
6. REFERENCES ......................................................................................................................................22
7. PACKAGE DIMENSIONS ....................................................................................................................23
7.1 SOIC ..............................................................................................................................................23
7.2 TSSOP ..........................................................................................................................................24
8. PACKAGE THERMAL RESISTANCE .................................................................................................25
LIST OF FIGURES
Figure 1. Output Test Load ...........................................................................................................................6
Figure 2. Maximum Loading..........................................................................................................................6
Figure 3. Single-Speed Stopband Rejection .................................................................................................9
Figure 4. Single-Speed Transition Band .......................................................................................................9
Figure 5. Single-Speed Transition Band (Detail)...........................................................................................9
Figure 6. Single-Speed Passband Ripple .....................................................................................................9
Figure 7. Double-Speed Stopband Rejection................................................................................................9
Figure 8. Double-Speed Transition Band......................................................................................................9
Figure 9. Double-Speed Transition Band (Detail) .......................................................................................10
Figure 10. Double-Speed Passband Ripple................................................................................................10
Figure 11. Serial Input Timing (External SCLK) ..........................................................................................11
Figure 12. Internal Serial Mode Input Timing ..............................................................................................12
Figure 13. Internal Serial Clock Generation ................................................................................................12
Figure 14. Typical Connection Diagram......................................................................................................15
Figure 15. CS4340 Format 0 - I2S up to 24-Bit Data ..................................................................................17
Figure 16. CS4340 Format 1 - Left Justified up to 24-Bit Data ...................................................................17
Figure 17. CS4340 Format 2 - Right Justified, 24-Bit Data.........................................................................18
Figure 18. CS4340 Format 3 - Right Justified, 16-Bit Data.........................................................................18
Figure 19. De-Emphasis Curve...................................................................................................................18
LIST OF TABLES
Table 1.CS4340 Speed Modes ...................................................................................................................16
Table 2.Single-Speed Mode Standard Frequencies ...................................................................................16
Table 3.Double-Speed Mode Standard Frequencies..................................................................................16
Table 4.Internal SCLK/LRCK Ratio.............................................................................................................17
Table 5.Digital Interface Format - DIF1 and DIF0 .......................................................................................17
Table 6.De-Emphasis Control .....................................................................................................................18
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