Document
Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits
Benefits
G
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
PD - 96906C
IRFB4610 IRFS4610 IRFSL4610
HEXFET® Power MOSFET
D VDSS RDS(on) typ. max.
S ID
100V 11m:
14m: 73A
G DS
TO-220AB IRFB4610
G DS
D2Pak IRFS4610
G DS
TO-262 IRFSL4610
Absolute Maximum Ratings
Symbol
Parameter
ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current f Maximum Power Dissipation
Linear Derating Factor
VGS dV/dt
Gate-to-Source Voltage Peak Diode Recovery e
TJ TSTG
Operating Junction and Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy d
IAR
Avalanche Current c
EAR
Repetitive Avalanche Energy f
Thermal Resistance
Symbol
Parameter
RθJC
Junction-to-Case j
RθCS
Case-to-Sink, Flat Greased Surface , TO-220
RθJA
Junction-to-Ambient, TO-220 j
RθJA
Junction-to-Ambient (PCB Mount) , D2Pak ij
Max. 73 52 290 190 1.3 ± 20 7.6
-55 to + 175
300
10lbxin (1.1Nxm)
370 See Fig. 14, 15, 16a, 16b,
Typ. ––– 0.50 ––– –––
Max. 0.77 ––– 62 40
Units A
W W/°C
V V/ns °C
mJ A mJ
Units °C/W
www.irf.com
1
5/22/08
IRF/B/S/SL4610
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient
100 ––– ––– V VGS = 0V, ID = 250μA ––– 0.085 ––– V/°C Reference to 25°C, ID = 1mAc
RDS(on)
Static Drain-to-Source On-Resistance
––– 11 14 mΩ VGS = 10V, ID = 44A f
VGS(th)
Gate Threshold Voltage
2.0 ––– 4.0 V VDS = VGS, ID = 100μA
IDSS
Drain-to-Source Leakage Current
––– ––– 20 μA VDS = 100V, VGS = 0V
––– ––– 250
VDS = 100V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage
––– ––– -200
VGS = -20V
RG
Gate Input Resistance
––– 1.5 ––– Ω f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
73 ––– –––
Qg
Total Gate Charge
––– 90 140
Qgs
Gate-to-Source Charge
––– 20 –––
Qgd
Gate-to-Drain ("Miller") Charge
––– 36 –––
td(on)
Turn-On Delay Time
––– 18 –––
tr
Rise Time
––– 87 –––
td(off)
Turn-Off Delay Time
––– 53 –––
tf
Fall Time
––– 70 –––
Ciss
Input Capacitance
––– 3550 –––
Coss
Output Capacitance
––– 260 –––
Crss
Reverse Transfer Capacitance
––– 150 –––
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 330 –––
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 380 –––
S VDS = 50V, ID = 44A nC ID = 44A
VDS = 80V VGS = 10V f ns VDD = 65V ID = 44A RG = 5.6Ω VGS = 10V f pF VGS = 0V VDS = 50V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V h, See Fig.11 VGS = 0V, VDS = 0V to 80V g, See Fig. 5
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) c
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 73 A MOSFET symbol
D
––– ––– 290
showing the integral reverse
G S
p-n junction diode.
––– ––– 1.3 V TJ = 25°C, IS = 44A, VGS = 0V f
––– 35 53 ns TJ = 25°C
VR = 85V,
––– 42 63
TJ = 125°C
––– 44 66 nC TJ = 25°C
IF = 44A di/dt = 100A/μs f
––– 65 98
TJ = 125°C
––– 2.1 ––– A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction
temperature. Limited by TJmax, starting TJ = 25°C, L = 0.39mH
RG = 25Ω, IAS = 44A, VGS =10V. Part not recommended for use above this value. ISD ≤ 44A, di/dt ≤ 660A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994. Rθ is measured at TJ approximately 9.