MC74HCT573A

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS MC74HCT573A The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold times becomes latched. The Output Enable input does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the high−impedance state. Thus, data may be latched even when the outputs are not enabled. The HCT573A is identical in function to the HCT373A but has the Data Inputs on the opposite side of the package from the outputs to facilitate PC board layout. Features Output Drive Capability: 15 LSTTL Loads TTL/NMOS−Compatible Input Levels Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 10 mA In Compliance with the Requirements Defined by JEDEC Standard No. 7 A Chip Complexity: 234 FETs or 58.5 Equivalent Gates ♦ Improved Propagation Delays ♦ 50% Lower Quiescent Power These Devices are Pb−Free and are RoHS Compliant LOGIC DIAGRAM DATA INPUTS D0 2 D1 3 D2 4 D3 5 D4 6 D5 7 D6 8 D7 9 19 Q0 18 Q1 17 Q2 16 Q3 15 Q4 14 Q5 13 Q6 12 Q7 NONINVERTING OUTPUTS LATCH ENABLE 11 OUTPUT ENABLE 1 PIN 20 = VCC PIN 10 = GND DATA...