DatasheetsPDF.com

ICX224AQ Dataheets PDF



Part Number ICX224AQ
Manufacturers Sony
Logo Sony
Description CCD Image Sensor
Datasheet ICX224AQ DatasheetICX224AQ Datasheet (PDF)

ICX224AQ Diagonal 8mm (Type 1/2) Frame Readout CCD Image Sensor with Square Pixel for Color Cameras Description The ICX224AQ is a diagonal 8mm (Type 1/2) interline CCD solid-state image sensor with a square pixel array and 2.02M effective pixels. Frame readout allows all pixels' signals to be output independently within approximately 1/7.5 second. Also, the adoption of high frame rate readout mode supports 30 frames per second which is four times the speed in frame readout mode. This chip featur.

  ICX224AQ   ICX224AQ



Document
ICX224AQ Diagonal 8mm (Type 1/2) Frame Readout CCD Image Sensor with Square Pixel for Color Cameras Description The ICX224AQ is a diagonal 8mm (Type 1/2) interline CCD solid-state image sensor with a square pixel array and 2.02M effective pixels. Frame readout allows all pixels' signals to be output independently within approximately 1/7.5 second. Also, the adoption of high frame rate readout mode supports 30 frames per second which is four times the speed in frame readout mode. This chip features an electronic shutter with variable charge-storage time. Adoption of a design specially suited for frame readout ensures a saturation signal level equivalent to when using field readout. High resolution and high color reproductivity are achieved through the use of R, G, B primary color mosaic filters. Further, high sensitivity and low dark current are achieved through the adoption of Super HAD CCD technology. This chip is suitable for applications such as electronic still cameras, PC input cameras, etc. 20 pin DIP (Plastic) Pin 1 2 V Features • Supports frame readout 4 48 H • High horizontal and vertical resolution Pin 11 • Supports high frame rate readout mode: 30 frames/s • Square pixel Optical black position • Horizontal drive frequency: 18MHz • No voltage adjustments (reset gate and substrate bias are not adjusted.) (Top View) • R, G, B primary color mosaic filters on chip • High color reproductivity, high sensitivity, low smear • Continuous variable-speed shutter • Low dark current, excellent anti-blooming characteristics • 20-pin high-precision plastic package (top/bottom dual surface reference possible) Device Structure • Interline CCD image sensor • Image size: Diagonal 8mm (Type 1/2) • Total number of pixels: 1688 (H) × 1248 (V) approx. 2.11M pixels • Number of effective pixels: 1636 (H) × 1236 (V) approx. 2.02M pixels • Number of active pixels: 1620 (H) × 1220 (V) approx. 1.98M pixels • Chip size: 7.6mm (H) × 6.2mm (V) • Unit cell size: 3.9µm (H) × 3.9µm (V) • Optical black: Horizontal (H) direction: Front 4 pixels, rear 48 pixels Vertical (V) direction: Front 10 pixels, rear 2 pixels • Number of dummy bits: Horizontal 28 Vertical 1 (even fields only) • Substrate material: Silicon 10 ∗Super HAD CCD is a registered trademark of Sony Corporation. Super HAD CCD is a CCD that drastically improves sensitivity by introducing newly developed semiconductor technology by Sony Corporation into Sony's high-performance HAD (Hole-Accumulation Diode) sensor Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E98927B99 ICX224AQ Block Diagram and Pin Configuration (Top View) VOUT GND GND Vφ1B Vφ1A Vφ3B Vφ3A 2 B G B G B G NC 10 9 8 7 6 5 Vφ2 4 3 G B G B G B G G R G R G R Vertical register R G R G R Horizontal register Note) : Photo sensor 11 12 13 14 15 16 17 18 19 Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 Symbol Vφ4 Vφ3A Vφ3B Vφ2 Vφ1A Vφ1B GND NC GND VOUT GND Signal output Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock GND Pin No. 11 12 13 14 15 16 17 18 19 20 Symbol VDD φRG Hφ2 Hφ1 GND φSUB CSUB VL Hφ1 Hφ2 Description Supply voltage Reset gate clock Horizontal register transfer clock Horizontal register transfer clock GND Substrate clock Substrate bias∗1 Protective transistor bias Horizontal register transfer clock Horizontal register transfer clock ∗1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of 0.1µF. –2– φSUB CSUB GND φRG VDD Hφ2 Hφ1 Hφ1 Hφ2 VL Vφ4 1 Note) 20 ICX224AQ Absolute Maximum Ratings Item VDD, VOUT, φRG – φSUB Vφ1A, Vφ1B, Vφ3A, Vφ3B – φSUB Against φSUB Vφ2, Vφ4, VL – φSUB Hφ1, Hφ2, GND – φSUB CSUB – φSUB VDD, VOUT, φRG, CSUB – GND Against GND Vφ1A, Vφ1B, Vφ2, Vφ3A, Vφ3B, Vφ4 – GND Hφ1, Hφ2 – GND Against VL Vφ1A, Vφ1B, Vφ3A, Vφ3B – VL Vφ2, Vφ4, Hφ1, Hφ2, GND – VL Voltage difference between vertical clock input pins Between input clock pins Storage temperature Guaranteed temperature of performance Operating temperature ∗2 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%. +16V (Max.) is guaranteed for turning on or off power supply. Hφ1 – Hφ2 Hφ1, Hφ2 – Vφ4 Ratings –40 to +12 –50 to +15 –50 to +0.3 –40 to +0.3 –25 to –0.3 to +22 –10 to +18 –10 to +6.5 –0.3 to +28 –0.3 to +15 to +15 –6.5 to +6.5 –10 to +16 –30 to +80 –10 to +60 –10 to +75 Unit V V V V V V V V V V V V V °C °C °C ∗2 Remarks –3– ICX224AQ Bias Conditions Item Supply voltage Protective transistor bias Substrate clock Reset ga.


ICX224AQF ICX224AQ ICX224AKF


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)