PLL LSI with Built-In Prescaler
For Communications Equipment
MN6152U
PLL LSI with Built-In Prescaler
Overview
The MN6152U is a CMOS LSI for a phase-loc...
Description
For Communications Equipment
MN6152U
PLL LSI with Built-In Prescaler
Overview
The MN6152U is a CMOS LSI for a phase-locked loop (PLL) frequency synthesizer with serial data input. It consists of a two-coefficient prescaler, variable frequency divider, phase comparator, and charge pump. It offers high-speed operation on a low power supply voltage (1.8 to 2.5 V) and low power consumption (5 mW for VDD=2.0 V, F IN=100 MHz). Other features include intermittent operation by the power save (PS) control signal and high-speed pull-in that rapidly corrects the phase differences occurring at the start of operation.
Pin Assignment
XIN XOUT FV VDD DOP VSS LD FIN
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
OR OV LC FR PS LE DATA CLK
Features
Low power supply voltage: VDD =1.8 to 2.5V Low power consumption: 5mW (VDD =2.0V, FIN =100MHz) High-speed operation: FIN =175MHz Frequency dividing ratios in reference frequency dividing stage: 5 to 131,071 Frequency dividing ratios in comparator stage: 272 to 262,143 Lock detector output pin Two types of phase comparator output - Internal charge pump output - Output for external charge pump Output monitor pins for both comparator and reference frequency dividing stages (TOP VIEW) SSOP016-P-0225
MN6152U
Block Diagram
Amplifier XIN 17-bit programmable counter XOUT 17-bit latch CLK 9 Control 2 1 Phase matching
13 FR
14 LC
DATA 18-bit shift register
10 Data control
7 LD 15 OV 16 OR 5 DOP
Phase comparator
LE 18-bit latch PS Amplifier FIN 8 Pres...
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