MC74HC589A

MC74HC589A 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output High−Performance Silicon−Gate CMOS http://onsemi.com The MC74HC589A device consists of an 8−bit storage latch which feeds parallel data to an 8−bit shift register. Data can also be loaded serially (see the Function Table). The shift register output, QH, is a 3−state output, allowing this device to be used in bus−oriented systems. The HC589A directly interfaces with the SPI serial data port on CMOS MPUs and MCUs. SOIC−16 D SUFFIX CASE 751B TSSOP−16 DT SUFFIX CASE 948F PIN ASSIGNMENT Features Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7 A Chip Complexity: 526 FETs or 131.5 Equivalent Gates NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free and are RoHS Compliant B1 C2 D3 E4 F5 G6 H7 GND 8 16 VCC 15 A 14 SA 13 SERIAL SHIFT/ PARALLEL LOAD 12 LATCH CLOCK 11 SHIFT CLOCK 10 OUTPUT ENABLE 9 QH MARKING DIAGRAMS 16 SERIAL DATA INPUT PARALLEL DATA INPUTS SA 14 A 15 B1 C2 D3 E4 F5 G6 H7 LATCH CLOCK 12 DATA LATCH SHIFT REGISTER SHIFT CLOCK 11 SERIAL SHIFT/ 13 PARALLEL LOAD OUTPUT ENABLE 10 Figure 1. Logic Dia...