MC74HC573A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal 3-State Noninverting Transparent Latch High–Performance Silicon–Gate CMOS The MC54/74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched. The HC573A is identical in function to the HCT373A but has the data inputs on the opposite side of the package from the outputs to facilitate PC board layout. The HC573A is the noninverting version of the HC563A. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 218 FETs or 54.5 Equivalent Gates MC54/74HC573A J SUFFIX CERAMIC PACKAGE CASE 732–03 1 20 20 1 20 1 N SUFFIX PLASTIC PACKAGE CASE 738–03 DW SUFFIX SOIC PACKAGE CASE 751D–04 DT SUFFIX TSSOP PACKAGE CASE 948E–02 20 1 ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXADW MC74HCXXXADT Ceramic Plastic SOIC TSSOP LOGIC DIAGRAM D0 D1 D2 DATA INPUTS D3 D4 D5 D6 D7 LATCH ENABLE OUTPUT ENABLE 2 3 4 5 6 7 8 9 11 1 PIN 20 = VCC PIN 10 = GND 19 18 17 16 15 14 13 12 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 NONINVERTING OUTPUTS PIN ASSIGNMENT OUTPUT ENABLE D0 D1 D2...