Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by BSS64LT1/D
Driver Transistor
NPN Silicon
1 BASE
COLLECTOR 3
BSS64LT1
2 EMITTER
3 1 2
MAXIMUM RATINGS
Rating Collector – Emitter Voltage Collector – Base Voltage Emitter – Base Voltage Collector Current — Continuous Symbol VCEO VCBO VEBO IC Value 80 120 5.0 100 Unit Vdc Vdc Vdc mAdc
CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB)
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation FR– 5 Board(1) TA = 25°C Derate above 25°C Thermal Resistance Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 RqJA PD 556 300 2.4 RqJA TJ, Tstg 417 – 55 to +150 Unit mW mW/°C °C/W mW mW/°C °C/W °C
DEVICE MARKING
BSS64LT1 = AM
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector – Emitter Breakdown Voltage (IC = 4.0 mAdc) Collector – Base Breakdown Voltage (IC = 100 mAdc) Emitter – Base Breakdown Voltage (IE = 100 mAdc) Collector Cutoff Current (VCE = 90 Vdc) (TA = 150°C) Emitter Cutoff Current (VEB = 4.0 Vdc) 1. FR– 5 = 1.0 0.75 2. Alumina = 0.4 0.3 V(BR)CEO 80 V(BR)CBO 120 V(BR)EBO 5.0 ICBO — — IEBO — 200 0.1 500 nAdc — µAdc — Vdc — Vdc Vdc
0.062 in. 0.024 in. 99.5% alumina.
Thermal Clad is a trademark of the Bergquist Company.
REV 1
Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1996
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BSS64LT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS
DC Current Gain (VCE = 1.0 Vdc, IC = 10 mAdc) Collector – Emitter Saturation Voltage (IC = 4.0 mAdc, IB = 400 µAdc) (IC = 50 mAdc, IB = 15 mAdc) Forward Base – Emitter Voltage HFE 20 VCE(sat) — — VBE(sat) — 0.15 0.2 — — — Vdc —
SMALL– SIGNAL CHARACTERISTICS
Current – Gain — Bandwidth Product (IC = 4.0 mAdc, VCE = 10 Vdc, f = 20 MHz) Output Capacitance (VCB = 10 Vdc, f = 1.0 MHz) fT 60 Cob — 20 — pF MHz
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
BSS64LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.037 0.95
0.037 0.95
0.079 2.0 0.035 0.9 0.031 0.8
inches mm
SOT–23 SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal .