ST20-GP1

® ST20-GP1 GPS PROCESSOR ENGINEERING DATA FEATURES s Application specific features 12 channel GPS correlation DSP hardware and ST20 CPU (for control and position caluculations) on one chip no TCXO required RTCA-SC159 / WAAS / EGNOS supported s GPS performance accuracy - stand alone with SA on <100m, SA off <30m - differential <1m - surveying <1cm time to first fix - autonomous start 90s - cold start 45s - warm start 7s - obscuration 1s s 32-bit ST20 CPU 16/33 MHz processor clock 25 MIPS at 33 MHz fast integer/bit operations s 4 Kbytes on-chip SRAM 130 Mbytes/s maximum bandwidth s Programmable memory interface 4 separately configurable regions 8/16-bits wide support for mixed memory 2 cycle external access s Serial communications Programmable UART (ASC) OS-Link s Vectored interrupt subsystem 2 dedicated interrupt pins 5 levels of interrupt s Power management low power operation power down modes s Professional toolset support ANSI C compiler and libraries INQUEST advanced debugging tools s Technology Static clocked 50 MHz design 3.3 V, sub micron technology s 100 pin PQFP package October 1996 The information in this datasheet is subject to change GPS radio ST20-GP1 12 channel GPS hardware DSP ST20 CPU Low power controller Real time clock/calendar Interrupt controller Serial communications 2 UART (ASC) 1 OS-Link Parallel input/output 4K SRAM . . . . . . 6 Programmable memory interface Byte-wide parallel port 8 RAM ROM...