MUN53xxDW1T1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MUN5311DW1T1/D Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the MUN5311DW1T1 series, two complementary BRT devices are housed in the SOT–363 package which is ideal for low power surface mount applications where board space is at a premium. Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel. MUN5311DW1T1 SERIES Motorola Preferred Devices 6 5 4 1 2 3 CASE 419B–01, STYLE 1 SOT–363 (3) R1 Q1 (2) R2 (1) Q2 R2 (4) (5) R1 (6) MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2, – minus sign for Q2 (PNP) omitted) Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC RθJA TJ, Tstg PD Marking 11 12 13 14 15 16 30 31 32 33 34 35 R1 (K) 10 22 47 10 10 4.7 1.0 2.2 4.7 4.7 22 2.2 Value 50 50 100 Unit Vdc Vdc mAdc °C/W °C mW THERMAL CHARACTERISTICS Thermal Resistance — Junction-to-Ambient (surface mounted) Operating and Storage Temperature Rang...