Image Sensor. ICX274AQF Datasheet

ICX274AQF Sensor. Datasheet pdf. Equivalent

Part ICX274AQF
Description Diagonal 8.923mm (Type 1/1.8) Progressive Scan CCD Image Sensor
Feature ICX274AQF Diagonal 8.923mm (Type 1/1.8) Progressive Scan CCD Image Sensor with Square Pixel for Colo.
Manufacture Sony Corporation
Datasheet
Download ICX274AQF Datasheet

ICX274AQF Diagonal 8.923mm (Type 1/1.8) Progressive Scan CCD ICX274AQF Datasheet
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ICX274AQF
ICX274AQF
Diagonal 8.923mm (Type 1/1.8) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras
Description
The ICX274AQF is a diagonal 8.923mm (Type 1/1.8)
interline CCD solid-state image sensor with a square
pixel array and 2.01M effective pixels. Progressive
scan allows all pixels' signals to be output
independently within approximately 1/15 second,
and output is also possible using various addition
and pulse elimination methods. This chip features an
electronic shutter with variable charge-storage time
which makes it possible to realize full-frame still
images without a mechanical shutter. High resolution
and high color reproductivity are achieved through
the use of R, G, B primary color mosaic filters as the
color filters. Further, high sensitivity and low dark
current are achieved through the adoption of Super
HAD CCD technology.
This chip is suitable for applications such as
electronic still cameras, PC input cameras, etc.
20 pin SOP (Plastic)
Features
High horizontal and vertical resolution
Supports the following modes
Progressive scan mode (with/without mechanical shutter)
2/8-line readout mode
2/4-line readout mode
2-line addition mode
Center scan modes (1), (2) and (3)
AF modes (1) and (2)
Square pixel
Horizontal drive frequency: 28.6364MHz (typ.), 36.0MHz (max.)
Reset gate bias are not adjusted
R, G, B primary color mosaic filters on chip
High sensitivity, low dark current
Continuous variable-speed shutter function
Excellent anti-blooming characteristics
20-pin high-precision plastic package
Pin 1
V
12
Pin 11
H
48
Optical black position
(Top View)
2
10
Device Structure
Interline CCD image sensor
Image size:
Diagonal 8.923mm (Type 1/1.8)
Total number of pixels:
1688 (H) × 1248 (V) approx. 2.11M pixels
Number of effective pixels: 1628 (H) × 1236 (V) approx. 2.01M pixels
Number of active pixels: 1620 (H) × 1220 (V) approx. 1.98M pixels
Recommended number of
recording pixels:
1600 (H) × 1200 (V) approx. 1.92M pixels
Chip size:
8.50mm (H) × 6.80mm (V)
Unit cell size:
4.40µm (H) × 4.40µm (V)
Optical black:
Horizontal (H) direction: Front 12 pixels, rear 48 pixels
Vertical (V) direction: Front 10 pixels, rear 2 pixels
Number of dummy bits: Horizontal 28
Vertical 1
Substrate material:
Silicon
Wfine CCD is trademark of Sony corporation.
Represents a CCD adopting progressive scan, primary color filter and square pixel.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E02262



ICX274AQF
Block Diagram and Pin Configuration
(Top View)
10 9 8 7 6 5 4 3 2 1
ICX274AQF
GBG
RGR
GBG
RGR
GBG
RGR
GBG
RGR
Horizontal register
B
G
B
G
B
G
B
G Note)
Note) : Photo sensor
11 12 13 14 15 16 17 18 19 20
Pin Description
Pin No. Symbol
1 Vφ4
2 Vφ3A
3 Vφ3B
4 Vφ3C
5 Vφ2A
6 Vφ2B
7 Vφ2C
8 Vφ1
9 GND
10 VOUT
Description
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
Signal output
Pin No. Symbol
11 VDD
12 φRG
13 Hφ2B
14 Hφ1B
15 GND
16 φSUB
17 CSUB
18 VL
19 Hφ1A
20 Hφ2A
Description
Supply voltage
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
GND
Substrate clock
Substrate bias1
Protective transistor bias
Horizontal register transfer clock
Horizontal register transfer clock
1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of
0.1µF.
2





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