MC74HC640A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal 3-State Inverting Bus Transceiver High–Performance Silicon–Gate CMOS The MC54/74HC640A is identical in pinout to the LS640. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC640A is a 3–state transceiver that is used for 2–way asynchronous communication between data buses. The device has an active–low Output Enable pin, which is used to place the I/O ports into high–impedance states. The Direction control determines whether data flows from A to B or from B to A. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 276 FETs or 69 Equivalent Gates MC54/74HC640A J SUFFIX CERAMIC PACKAGE CASE 732–03 1 20 20 1 N SUFFIX PLASTIC PACKAGE CASE 738–03 20 1 DW SUFFIX SOIC PACKAGE CASE 751D–04 ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXADW Ceramic Plastic SOIC LOGIC DIAGRAM A1 A2 A3 A DATA PORT A4 A5 A6 A7 A8 DIRECTION OUTPUT ENABLE 2 3 4 5 6 7 8 9 1 19 18 17 16 15 14 13 12 11 B1 B2 B3 B4 B5 B6 B7 B8 B DATA PORT PIN ASSIGNMENT DIRECTION A1 A2 A3 A4 A5 A6 A7 A8 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OUTPUT ENABLE B1 B2 B3 B4 B5 B6 B7 B8 PIN 10 = GND PIN 20 = VCC FUNCTION TABLE Contr...