Rad. Hard 0.18 Um CMOS Cell-based ASIC for Space Use
Description
Features
Comprehensive Library of Standard Logic and I/O Cells ATC18RHA Core and I/O Cells Designed to Operate with VDD = 1.8V Sparing 0.15V as
Main Target Operating Conditions IO33 Pad Libraries Provide Interfaces to 3V Environments Memory Cells Compiled to the Precise Requirements of the Design EDAC Library SEU Hardened DFF’s Cold Sparring Buffers High...
