MTB50N06EL

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTB50N06EL/D Advance Information TMOS E-FET.™ Power Field Effect Transistors D2PAK for Surface Mount Logic Level TMOS (L2TMOSāā™ā) N–Channel Enhancement–Mode Silicon Gate These TMOS Power FETs are designed for high speed, low loss power switching applications such as switching regulators, converters, solenoid and relay drivers. This Logic Level Series part is specified to operate with level logic gate–to–source voltage of 5 volt and 4 volt. Silicon Gate for Fast Switching Speeds Low RDS(on) — 0.028 Ω max Replace External Zener Transient Suppressor — Absorbs High Energy in the Avalanche Mode Specially Designed Leadframe for Maximum Power Dissipation Available in 24 mm 13–inch/800 Unit Tape & Reel, Add T4 Suffix to Part Number MTB50N06EL Motorola Preferred Device TMOS POWER FET LOGIC LEVEL 50 AMPERES 60 VOLTS RDS(on) = 0.028 OHM ® D G S CASE 418B–02, Style 2 D2PAK MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain–Source Voltage Drain–Gate Voltage (RGS = 1.0 MΩ) Gate–Source Voltage — Continuous Drain Current — Continuous Drain Current — Continuous @ 100°C Drain Current — Single Pulse (tp ≤ 10 µs) Symbol VDSS VDGR VGS ID ID IDM PD Value 60 60 ±15 50 28 142 125 1.0 2.5 – 55 to 150 400 1.0 62.5 50 260 Unit Vdc Vdc Vdc Adc Apk Watts W/°C Watts °C mJ °C/W Total Power Dissipation Derate above 25°C Total Power Dissipation @ TA = 25°C, when mounted with the minimum recommended pad size Ope...