54SXxxA

v5.1 SX-A Family FPGAs Leading-Edge Performance 250 MHz System Performance 350 MHz Internal Performance ™ Specifications 12,000 to 108,000 Available System Gates Up to 360 User-Programmable I/O Pins Up to 2,012 Dedicated Flip-Flops 0.22 µ / 0.25 µ CMOS Process Technology Features Hot-Swap Compliant I/Os Power-Up/Down Friendly (No Sequencing Required for Supply Voltages) 66 MHz PCI Compliant Nonvolatile, Single-Chip Solution Configurable I/O Support for 3.3 V / 5 V PCI, 5 V TTL, 3.3 V LVTTL, 2.5 V LVCMOS2 2.5 V, 3.3 V, and 5 V Mixed-Voltage Operation with 5 V Input Tolerance and 5 V Drive Strength Devices Support Multiple Temperature Grades Configurable Weak-Resistor Pull-Up or Pull-Down for I/O at Power-Up Individual Output Slew Rate Control Up to 100% Resource Utilization and 100% Pin Locking Deterministic, User-Controllable Timing Unique In-System Diagnostic and Verification Capability with Silicon Explorer II Boundary-Scan Testing in Compliance with IEEE Standard 1149.1 (JTAG) Actel Secure Programming Technology with FuseLock™ Prevents Reverse Engineering and Design Theft Table 1 SX-A Product Profile Device Capacity Typical Gates System Gates Logic Modules Combinatorial Cells Dedicated Flip-Flops Maximum Flip-Flops Maximum User I/Os Global Clocks Quadrant Clocks Boundary Scan Testing 3.3 V / 5 V PCI Input Set-Up (External) Speed Grades Temperature Grades Package (by pin count) PQFP TQFP PBGA FBGA CQFP A54SX08A 8,000 12,000 76...