Document
ST16C554/554D ST68C554
QUAD UART WITH 16-BYTE FIFOS
DESCRIPTION
The ST16C554D is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface. The 554D is an enhanced UART with 16 byte FIFOs, receive trigger levels and data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status, modem interface control. System interrupts may be tailored to meet user requirements. An internal loopback capability allows onboard diagnostics. The 554D is available in 64 pin TQFP, and 68 pin PLCC packages. The 68 pin PLCC package offer an additional 68 mode which allows easy integration with Motorola, and other popular microprocessors. The ST16C554CQ64 (64 pin) offers three state interrupt control while the ST16C554DCQ64 provides constant active interrupt outputs. The 64 pin devices do not offer TXRDY/ RXRDY outputs. The 554D combines the package interface modes of the 16C554 and 68C554 series on a single integrated chip.
PLCC Package
INTSEL -CDD 61 60 59 58 57 56 55 54 -CDA GND VCC RXD 63 RXA -RID 62 -RIA
D7
D6
D5
D4
D3
D2
D1 67
68
66
D0
65
-DSRA -CTSA -DTRA VCC -RTSA INTA -CSA TXA -IOW TXB -CSB INTB -RTSB GND -DTRB -CTSB -DSRB
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
64
9
8
7
6
5
4
3
2
1
-DSRD -CTSD -DTRD GND -RTSD INTD -CSD TXD -IOR TXC -CSC INTC -RTSC VCC -DTRC -CTSC -DSRC
ST16C554DCJ68 16 MODE
53 52 51 50 49 48 47 46 45 44
-CDB
RXB
VCC
RXC
-RIC
-RXRDY
-TXRDY
16/-68
RESET
XTAL1
XTAL2
• Compatibility with the Industry Standard ST16C454, ST68C454, ST68C554, TL16C554 • 1.5 Mbps transmit/receive operation (24MHz) • 16 byte transmit FIFO • 16 byte receive FIFO with error flags • Independent transmit and receive control • Software selectable Baud Rate Generator • Four selectable Receive FIFO interrupt trigger levels • Standard modem interface
ORDERING INFORMATION
Part number
ST16C554DCJ68 ST16C554DCQ64 ST16C554CQ64 ST16C554DIJ68 ST16C554DIQ64
68 64 64 68 64
Pins
PLCC TQFP TQFP PLCC TQFP
Package Operating temperature
0° C to + 70° C 0° C to + 70° C 0° C to + 70° C -40° C to + 85° C -40° C to + 85° C
Rev. 3.10 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 • (510) 668-7000 • FAX (510) 668-7017
-CDC
A2
A1
A0
GND
-RIB
FEATURES
ST16C554/554D/68C554
Figure 1, Package Descriptions
64 Pin TQFP Package
-CDD -CDA GND -CDA VCC RXD RXA -RID -RIA -RIA D7 D6 D5 D4 D3 D2 D1 D0
68 Pin PLCC Package
-CDD 61 60 59 58 57 56 55 54 GND VCC RXD 63 RXA -RID 62 N.C. 65 D7 D6 D5 D4 D3 D2 D1 67 D0 66
68
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
-DSRA -CTSA -DTRA VCC -RTSA INTA -CSA TXA -IOW -TXB -CSB INTB -RTSB GND -DTRB -CTSB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
48 47 46 45 44 43 42
-DSRD -CTSD -DTRD GND -RTSD INTD -CSD TXD -IOR TXC -CSC INTC -RTSC VCC -DTRC -CTSC
-DSRA -CTSA -DTRA VCC -RTSA -IRQ -CS TXA R/-W TXB A3 N.C. -RTSB GND -DTRB -CTSB -DSRB
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
64
9
8
7
6
5
4
3
2
1
-DSRD -CTSD -DTRD GND -RTSD N.C. N.C. TXD N.C. TXC A4 N.C. -RTSC VCC -DTRC -CTSC -DSRC
ST16C554CQ64 ST16C554DCQ64
41 40 39 38 37 36 35 34 33
ST16C554DCJ68 68 MODE
53 52 51 50 49 48 47 46 45 44
VCC
GND
RXC
RESET
-DSRC
-DSRB
XTAL1
XTAL2
-CDC
RXB
-RIB
A2
A1
A0
-CDB
-RIC
-CDB
RXB
VCC
RXC
-RIC
-RXRDY
-TXRDY
16/-68
-RESET
XTAL1
XTAL2
Rev. 3.10
2
-CDC
A2
A1
A0
GND
-RIB
ST16C554/554D/68C554
Figure 2, Block Diagram 16 Mode
D0-D7 -IOR -IOW RESET
Data bus & Control Logic
Transmit FIFO Registers
Transmit Shift Register
TX A-D
Inter Connect Bus Lines & Control signals
A0-A2 -CS A-D
Receive FIFO Registers
Receive Shift Register
Register Select Logic
RX A-D
INTSEL
Interrupt Control Logic
INT A-D -RXRDY -TXRDY
-DTR A-D -RTS A-D Clock & Baud Rate Generator Modem Control Logic -CTS A-D -RI A-D -CD A-D -DSR A-D
XTAL1 XTAL2
Rev. 3.10
3
ST16C554/554D/68C554
Figure 3, Block Diagram 68 Mode
D0-D7 R/-W -RESET
Data bus & Control Logic
Transmit FIFO Registers
Transmit Shift Register
TX A-D
A0-A4 -CS
Inter Connect Bus Lines & Control signals
Receive FIFO Registers
Receive Shift Register
Register Select Logic
RX A-D
-IRQ -RXRDY -TXRDY
Interrupt Control Logic
-DTR A-D -RTS A-D Modem Control Logic -CTS A-D -RI A-D -CD A-D -DSR A-D
XTAL1 XTAL2
Rev. 3.10
4
Clock & Baud Rate Generator
ST16C554/554D/68C554
SYMBOL DESCRIPTION
Symbol 16/-68
68 31
Pin
64 -
Signal type I
Pin Description 16/68 Interface Type Select (input with internal pull-up). This input provides the 16 (Intel) or 68 (Motorola) bus interface type select. The functions of -IOR, -IOW, INT AD, and -CS A-D are re-assigned with the logical state of this pin. When this pin is a logic 1, the 16 mode interface 16C554D is selected. When this pin is a logic 0, the 68 mode interface (68C554) is .