MOS FIELD EFFECT TRANSISTOR
P-CHANNEL POWER MOS FET
The µPA2713GR is P-channel MOS Field Effect Transistor
designed for power management applications of notebook
computers and Li-ion battery protection circuit.
• Low on-state resistance
RDS(on)1 = 16 mΩ MAX. (VGS = −10 V, ID = −4.0 A)
RDS(on)2 = 25 mΩ MAX. (VGS = −4.5 V, ID = −4.0 A)
RDS(on)3 = 30 mΩ MAX. (VGS = −4.0 V, ID = −4.0 A)
• Low Ciss: Ciss = 1600 pF TYP.
• Small and surface mount package (Power SOP8)
PACKAGE DRAWING (Unit: mm)
1, 2, 3 : Source
4 : Gate
5, 6, 7, 8: Drain
1.27 0.78 MAX.
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Total Power Dissipation Note3
Single Avalanche Current Note4
Single Avalanche Energy Note4
Tstg −55 to +150
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
3. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
4. Starting Tch = 25°C, VDD = −15 V, RG = 25 Ω, L = 100 µH, VGS = −20 → 0 V
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G15981EJ1V0DS00 (1st edition)
Date Published January 2003 NS CP(K)
Printed in Japan