UPA2751GR

DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2751GR SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION The µPA2751GR is asymmetrical dual N-Channel MOS Field Effect Transistor designed for DC/DC converters of notebook computers and so on. PACKAGE DRAWING (Unit: mm) 8 5 CH2 CH2 CH1 CH1 1 ; Source 1 2 ; Gate 1 7, 8 ; Drain 1 3 ; Source 2 4 ; Gate 2 5, 6 ; Drain 2 FEATURES Asymmetric dual chip type Low on-state resistance, Low Ciss CH1: RDS(on)2: 21.0 mΩ MAX. (VGS = 4.5 V, ID = 4.5 A) Ciss = 1040 pF TYP. (VDS = 10 V, VGS = 0 V) CH2: RDS(on)2: 35.0 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A) Ciss = 480 pF TYP. (VDS = 10 V, VGS = 0 V) Built-in G-S protection diode Small and surface mount package (Power SOP8) 1 4 5.37 Max. +0.10 –0.05 6.0 ±0.3 4.4 0.8 1.8 Max. 1.44 0.15 0.05 Min. 0.5 ±0.2 0.10 1.27 0.40 0.78 Max. 0.12 M ORDERING INFORMATION PART NUMBER PACKAGE Power SOP8 +0.10 –0.05 µPA2751GR ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (pulse) Note1 Total Power Dissipation (1 unit) Note2 Total Power Dissipation (2 unit) Channel Temperature Storage Temperature Note3 Single Avalanche Current Note3 Single Avalanche Energy Note3 Single Avalanche Current Note3 Single Avalanche Energy Note2 CH1/CH2 CH1/CH2 CH1 CH2 CH1 CH2 CH1/CH2 CH1/CH2 CH1/CH2 CH1/CH2 CH1 CH1 CH2 CH2 VDSS VGSS ID(DC) ID(DC) ID(pulse) ID(pulse) PT PT Tch Tstg IAS EAS IAS EAS 30...