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UPA2717GR

NEC

SWITCHING N- AND P-CHANNEL POWER MOS FET

DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2717GR SWITCHING P-CHANNEL POWER MOS FET DESCRIPTION The µ PA2717GR is P-Ch...


NEC

UPA2717GR

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Description
DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2717GR SWITCHING P-CHANNEL POWER MOS FET DESCRIPTION The µ PA2717GR is P-Channel MOS Field Effect Transistor designed for power management applications of notebook computers and Li-ion battery protection circuit. PACKAGE DRAWING (Unit: mm) 8 5 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8 : Drain FEATURES Low on-state resistance RDS(on)1 = 5.5 mΩ MAX. (VGS = –10 V, ID = –7.5 A) RDS(on)2 = 8.9 mΩ MAX. (VGS = –4.5 V, ID = –7.5 A) Low Ciss: Ciss = 3550 pF TYP. Built-in gate protection diode Small and surface mount package (Power SOP8) 1 4 5.37 MAX. +0.10 –0.05 6.0 ±0.3 4.4 0.8 1.8 MAX. 1.44 0.05 MIN. ORDERING INFORMATION PART NUMBER PACKAGE Power SOP8 0.15 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M µ PA2717GR ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (pulse) Note1 Note2 Note3 VDSS VGSS ID(DC) ID(pulse) PT1 PT2 Tch Tstg –30 m20 m15 m150 2 2 150 –55 to + 150 –15 22.5 V V A A W W °C °C A mJ Gate Protection Diode Source Gate Drain EQUIVALENT CIRCUIT Total Power Dissipation Total Power Dissipation Channel Temperature Storage Temperature Body Diode Single Avalanche Current Single Avalanche Energy Notes 1. 2. 3. 4. Note4 Note4 IAS EAS PW ≤ 10 µs, Duty Cycle ≤ 1% Mounted on ceramic substrate of 1200 mm2 x 2.2 mm Mounted on glass epoxy board of 1 inch x 1 inch x 0.8 mm, PW = 10 sec S...




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