74V2T241

74V2T241 DUAL BUS BUFFER NON INVERTED (3-STATE) s s s s s s s s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C POWER DOWN PROTECTION ON INPUTS AND OUTPUTS COMPATIBLE WITH TTL LEVEL: VIH=2.0V(MIN), VIL=0.8V(MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY SOT23-8L ORDER CODES PACKAGE SOT23-8L T&R 74V2T241STR DESCRIPTION The 74V2T241 is an advanced high-speed CMOS DUAL BUS BUFFER NON INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It has one active-high and one active-low output enable. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V systems and it is ideal for portable applications like personal digital assistant, camcorder and all battery-powered equipment. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS June 2003 1/8 74V2T241 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN N° 1, 7 2, 5 3, 6 4 8 SYMBOL 1G, 2G 1A, 2A 2Y, 1Y GND VCC NAME AND FUNCTION Output Enable Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE 1G L L H X: "H" or "L" Z: Hig...