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STG3684 Dataheets PDF



Part Number STG3684
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description LOW VOLTAGE 0.5 MAX DUAL SPDT SWITCH
Datasheet STG3684 DatasheetSTG3684 Datasheet (PDF)

STG3684 LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE s s s s s s HIGH SPEED: tPD = 0.3ns (TYP.) at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC = 2.3V ULTRA LOW POWER DISSIPATION: ICC = 0.2µA (MAX.) at TA = 85°C LOW "ON" RESISTANCE VIN = 0V: RON = 0.5Ω (MAX. TA = 25°C) at VCC = 2.7 RON = 0.8Ω (MAX. TA = 25°C) at VCC = 2.3V RON = 3.0Ω (MAX. TA = 25°C) at VCC = 1.8V WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 1.65V to 4.3V SINGLE SUPPLY 4.3V TOLERANT AND 1.8V COMPATIBLE THRESHO.

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STG3684 LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE s s s s s s HIGH SPEED: tPD = 0.3ns (TYP.) at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC = 2.3V ULTRA LOW POWER DISSIPATION: ICC = 0.2µA (MAX.) at TA = 85°C LOW "ON" RESISTANCE VIN = 0V: RON = 0.5Ω (MAX. TA = 25°C) at VCC = 2.7 RON = 0.8Ω (MAX. TA = 25°C) at VCC = 2.3V RON = 3.0Ω (MAX. TA = 25°C) at VCC = 1.8V WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 1.65V to 4.3V SINGLE SUPPLY 4.3V TOLERANT AND 1.8V COMPATIBLE THRESHOLD ON DIGITAL CONTROL INPUT at VCC = 2.3 to 3.0V LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) QFN ORDER CODES PACKAGE QFN T&R STG3684QTR DESCRIPTION The STG3684 is an high-speed CMOS DUAL ANALOG S.P.D.T. (Single Pole Dual Throw) SWITCH or DUAL 2:1 Multiplexer/Demultiplexer Bus Switch fabricated in silicon gate C2MOS technology. It is designed to operate from 1.65V to 4.3V, making this device ideal for portable applications. It offers very low ON-Resistance (<0.5Ω) at VCC=3.0V. The nIN inputs are provided to control the switches. The switches nS1 are ON (they are PIN CONNECTION connected to common Ports Dn) when the nIN input is held high and OFF (high impedance state exists between the two ports) when nIN is held low; the switches nS2 are ON (they are connected to common Ports Dn) when the nIN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, Break Before Make Delay Time and Ultra Low Power Consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. It’s available in the commercial temperature range in the QFN package. May 2004 Rev. 2 1/11 STG3684 Figure 1: Input Equivalent Circuit Table 1: Pin Description QFN PIN N° 1, 9 2, 10 4, 12 3, 11 5,7,8,13,15,16 6 14 SYMBOL 1IN, 2IN 1S1 to 2S1 1S2 to 2S2 D1, D2 NC GND VCC NAME AND FUNCTION Controls Independent Channels Common Channels Not Connected Ground (0V) Positive Supply Voltage Table 2: Truth Table IN H L (*) High Impedance SWITCH S1 ON OFF(*) SWITCH S2 OFF(*) ON Table 3: Absolute Maximum Ratings Symbol VCC VI VIC VO IIKC IIK IOK IO IOP Parameter Supply Voltage DC Input Voltage DC Control Input Voltage DC Output Voltage DC Input Diode Current on control pin (VIN < 0V) DC Input Diode Current (VIN < 0V) DC Output Diode Current DC Output Current DC Output Current Peak (pulse at 1ms, 10% duty cycle) Value -0.5 to 4.6 -0.5 to VCC + 0.5 -0.5 to 4.6 -0.5 to VCC + 0.5 − 50 ± 50 ± 20 ± 300 ± 500 ± 100 1120 -65 to 150 300 Unit V V V V mA mA mA mA mA mA mW °C °C ICC or IGND DC VCC or Ground Current Power Dissipation at Ta=70°C (1) PD Tstg TL Storage Temperature Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. (1) Derate above 70°C: by 18.5mW/°C. Table 4: Recommended Operating Conditions Symb.


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