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ICS83023

Integrated Circuit Solution

DUAL 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER

Integrated Circuit Systems, Inc. ICS932S203 Frequency Generator with 133MHz Differential CPU Clocks Recommended Applic...


Integrated Circuit Solution

ICS83023

File Download Download ICS83023 Datasheet


Description
Integrated Circuit Systems, Inc. ICS932S203 Frequency Generator with 133MHz Differential CPU Clocks Recommended Application: Servers based on Intel CK408 processors Output Features: 4 Differential CPU Clock Pairs @ 3.3V 7 PCI (3.3V) @ 33.3MHz 3 PCI_F (3.3V) @ 33.3MHz 1 USB (3.3V) @ 48MHz 1 DOT (3.3V) @ 48MHz 1 REF (3.3V) @ 14.318MHz 1 3V66 (3.3V) @ 66.6MHz 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz 3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN or 66.6MHz 1 66MHz_IN/3V66 (3.3V) @ Input/66MHz Features: Supports spread spectrum modulation, down spread 0 to -0.5%. Efficient power management scheme through PD# and PCI_STOP#. Uses external 14.318MHz crystal Stop clocks and functional control available through SMBus interface. Key Specifications: CPU Output Jitter <150ps 3V66 Output Jitter <250ps CPU Output Skew <150ps Pin Configuration 56-Pin 300mil SSOP/TSSOP * These inputs have 150K internal pull-up resistor to VDD. Block Diagram Functionality CPU (MHz) 100 133.3 100 133.3 Hi-Z Tclk/2 3V66 (MHz) 66.6 66.6 66.6 66.6 Hi-Z Tclk/4 66Buff[2:0] 3V66[4:2] (MHz) 66.6 In path 66. In path 66.6 66.6 Hi-Z Tclk/4 PCI_F PCI (MHz) 66.6 in/2 66.6 in/2 33.3 33.3 Hi-Z Tclk/8 FS1 FS0 1 1 0 0 mid mid 0 1 0 1 0 1 0601E—12/22/04 ICS932S203 Pin Configuration PIN NUMBER 1, 8, 14, 19, 26, 32, 37, 46, 50 2 3 7, 6, 5 4, 9, 15, 20, 27, 31, 36, 41, 47 18, 17, 16, 13, 12,11, 10 23, 22, 21 24 25 PIN NAME VDD X1 X2 PCICLK_F (2:0) GND PCICLK (6:0) 66MHz_OUT (2:0) 3V66 (4:2) 66MHz_IN...




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