MBM29F033C

FUJITSU SEMICONDUCTOR DATA SHEET DS05-20869-3E FLASH MEMORY CMOS 32M (4M × 8) BIT MBM29F033C-70/-90/-12 s FEATURES Single 5.0 V read, write, and erase Minimizes system level power requirements Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection 40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type) Minimum 100,000 write/erase cycles High performance 70 ns maximum access time Sector erase architecture Uniform sectors of 64K bytes each Any combination of sectors can be erased. Also supports full chip erase Embedded EraseTM Algorithms Automatically preprograms and erases the chip or any sector Embedded ProgramTM Algorithms Automatically programs and verifies data at specified address Data Polling and Toggle Bit feature for detection of program or erase cycle completion Ready/BUSY output (RY/BY) Hardware method for detection of program or erase cycle completion Low VCC write inhibit ≤ 3.2 V Hardware RESET pin Resets internal state machine to the read mode Erase Suspend/Resume Supports reading or programming data to a sector not being erased Sector group protection Hardware method that disables any combination of sector groups from write or erase operation (a sector group consists of 4 adjacent sectors of 64K bytes each) Temporary sector groups unprotection Hardware method temporarily enable any combination of sectors from write or erase ...