74LVT373

Philips Semiconductors Low Voltage Products Objective specification 3.3 Volt ABT octal transparent latch (3–State) 74LVT373 FEATURES Designed for use in the 3.3V high–performance market Latch–up protection exceeds 500mA per JEDEC JC40.2 Std 17 independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is High. The latch remains transparent to the data inputs while E is High, and stores the data that is present one setup time before the High-to-Low enable transition. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in the High-impedance ”OFF” state, which means they will neither drive nor load the bus. Supports mixed–mode signal operation; 5V Bus–hold inputs eliminate the need for input and output voltages with 3.3V VCC external pull-up resistors to hold unused pins ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model DESCRIPTION The 74LVT373 device is designed specifically for low–voltage (3.3V) VCC operation, but can provide a TTL interface to a 5V system environment. The 74LVT373 high-performance BiCMOS device combines zero static and low dynamic pow...