M1010-01

Integrated Circuit Systems, Inc. Preliminary Information M1010-01 VCSO BASED CLOCK JITTER ATTENUATOR PIN ASSIGNMENT (9 x 9 mm SMT) FIN_SEL1 GND NC DIF_REF0 nDIF_REF0 REF_SEL DIF_REF1 nDIF_REF1 VCC FIN_SEL0 SEL0 SEL1 SEL2 NC VCC DNC DNC DNC 27 26 25 24 23 22 21 20 19 GENERAL DESCRIPTION The M1010-01 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for OC-12 and OC-48 optical network systems supporting 622 2,488 MHz rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M1010-01 module includes a proprietary SAW (surface acoustic wave) delay line as part of the VCSO. This results in a high frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter. 28 29 30 31 32 33 34 35 36 M1010 (Top View) 18 17 16 15 14 13 12 11 10 VCC NC nFOUT FOUT GND NC NC VCC GND FEATURES ◆ Ideal for OC-12/48 data clock ◆ Integrated SAW delay line ◆ Output frequencies from 150 to 175 MHz (Specify VCSO output frequency at time of order) ◆ Low phase jitter of 0.5 ps rms, typical (12kHz to 20MHz) ◆ LVPECL clock output ◆ Pin-selectable feedback and reference divider ratios, no programming required ◆ Scalable dividers provide further adjustment of loop bandwidth as well as jitter tolerance ◆ Reference clock inputs support differential LVDS, LVPECL, as well as ...