IS75V16F128GS32

IS75V16F128GS32 3.0 Volt Multi-Chip Package (MCP) — 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM MCP FEATURES Power supply voltage 2.7V to 3.3V High performance: Flash: 70ns maximum access time PSRAM: 65ns maximum access time ISSI PRELIMINARY INFORMATION MARCH 2003 ® Erase Algorithms: Automatically preprograms/erases the flash memory entirely, or by sector Program Algorithms: Automatically writes and verifies data at specified address Package: 107-ball BGA Operating Temperature: -30C to +85C Hidden ROM Region: FLASH FEATURES Power Dissipation: Read Current at 1 Mhz: 4 mA maximum Read Current at 5 Mhz:18 mA maximum Sleep Mode: 5 µA maximum User Configurable Banks Flash 1 (64 Mbit) Bank A1: 8Mbit (8KB x 8 and 64KB x 15) Bank B1: 24Mbit (64KB x 48) Bank C1: 24Mbit (64KB x 48) Bank D1: 8Mbit (8KB x 8 and 64KB x 15) Flash 2 (64 Mbit) Bank A2: 8Mbit (8KB x 8 and 64KB x 15) Bank B2: 24Mbit (64KB x 48) Bank C2: 24Mbit (64KB x 48) Bank D2: 8Mbit (8KB x 8 and 64KB x 15) User chooses two virtual banks from a combination of four physical banks Simultaneous R/W Operations (dual virtual bank): Zero latency between read and write operations; Data can be programmed or erased in one bank while data is simultaneously being read from the other bank 256 byte with a Factory-serialized secure electronic serial number (ESN), which is accessible through a command sequence Data Polling and Toggle Bit: Detects the completion of the program o...