VSC9182

PHYSICAL LAYER PRODUCT TIMESTREAM® PRODUCT FAMILY VSC9182 VSC9182 - 40G STS-1 Time Slot Interchange Output Backplane Interface !Serial 622.08 Mb/s Differential LVDS STS-12/STM-4 Outputs !Optionally Inserts Byte-interleaved Parity into B1 Byte of Following Frame !Optionally Scrambles Outgoing SONET Data !Optionally Inserts AIS or Unequipped on a Per-channel, Pertime-slot Basis CPU Interface !Generic Microprocessor (CPU) Interface used for Device Configuration and Status Checking F E AT U R E S : !10-bit Data Bus and 11-bit Address Bus Interconnection Matrix !Time & Space Switches any STS-(n) [n= 1, 3c, 12c] Signal of an Incoming STS-12 into any Byte Position of any STS-12 Output !Single Stage Non-blocking Structure of the Switch Allows for Multicast and Full Broadcast !Hitless Switching: Programming is Queued and Takes Effect After user Intervention During the Next Frame Boundary !Unequipped or AIS Signals can be Substituted into any of the Outgoing STS-1 Timeslots. !Provides a Capability to Read out the Switch Configuration (address map) Input Backplane Interface !Serial 622.08 Mb/s Differential LVDS STS-12/STM-4 Inputs !Receives 64 Serial 622.08 Mb/s STS-12/STM-4 Signals !Input Signals are Presumed Frequency Synchronous and Frame aligned to Within +/- 3 Time Slots of the System SYNC Input !Provides On-chip Data Recovery De-skewing Functionality to Bit-align, Byte-align and Frame-align all Incoming STS-12s (Within the above Tolerance) to the Local Clock !Flags Out-of-frame (...