MT90826

MT90826 Quad Digital Switch Advanced Information Features 4,096 × 4,096 channel non-blocking switching at 8.192 or 16.384 Mb/s Per-channel variable or constant throughput delay Accept ST-BUS streams of 2.048Mb/s, 4.096Mb/s, 8.192Mb/s, or 16.384 Mb/s Split Rate mode allows mix of two bit rates and rate conversions Automatic frame offset delay measurement for ST-BUS input and output streams Per-stream frame delay offset programming Per-channel high impedance output control Bit Error Monitoring on selected ST-BUS input and output channels. Per-channel message mode Connection memory block programming IEEE-1149.1 (JTAG) Test Port 3.3V local I/O with 5V tolerant inputs and TTL compatible outputs Medium and large switching platforms CTI application Voice/data multiplexer Digital cross connects WAN access system Wireless base stations VDD VSS TMS TDI TDO TCK DS5197 ISSUE 2 June 1999 Ordering Information MT90826AL MT90826AG 160 Pin MQFP 160 Pin PBGA -40 to +85 C Description The MT90826 Quad Digital Switch has a nonblocking switch capacity of 4,096 x 4,096 channels at a serial bit rate of 8.192Mb/s or 16.384 Mb/s, 2,048 x 2,048 channels at 4.096Mb/s and 1024 x 1024 channels at 2.048Mb/s. The device has many features that are programmable on a per stream or per channel basis, including message mode, input offset delay and high impedance output control. The per stream input and output delay control is particularly useful for managing large multi-chip switches wi...