Document
E2E1022-27-Y4
¡ Semiconductor MSM80C48/49/50 MSM80C35/39/40
¡ Semiconductor CMOS 8-Bit Microcontroller
This version: Jan. 1998 MSM80C48/49/50, MSM80C35/39/40 Previous version: Nov. 1996
GENERAL DESCRIPTION
The OKI MSM80C48/MSM80C49/MSM80C50 are 8-bit, low-power, high-performance microcontrollers implemented in silicon-gate complementary metal-oxide semiconductor technology. Integrated within these chips are 8K/16K/32K bits of mask program ROM, 512/1024/2048 bits of data RAM, 27 I/O lines, built-in 8 bit timer/counter, and oscillator. Program memory and data paths are byte wide. Eleven new instructions have been added to the NMOS version's instruction set, thereby optimizing power down, port data transfer, decrement and port float functions. Available in 40-pin plastic DIP (RS) or 44-pin plastic flat packages QFP (GSK).
FEATURES
• Lower power consumption enabled by CMOS silicon gate process • Completely static operation • Improved power-down feature • Instruction cycle : 1.36 ms (11 MHz) VCC=4.5 to 6.0 V (MSM80C48/49) 2.5 ms (6 MHz) VCC=3.5 to 6.0 V (MSM80C50) • 111 instructions • All instructions are usable even during execution of external ROM instructions. • Operation facility Addition, logical operations, and decimal adjust • Program memory (ROM) : 1K words ¥ 8 bits (MSM80C48) : 2K words ¥ 8 bits (MSM80C49) : 4K words ¥ 8 bits (MSM80C50) • Data memory (RAM) : 64 words ¥ 8 bits (MSM80C48) : 128 words ¥ 8 bits (MSM80C49) : 256 words ¥ 8 bits (MSM80C50) • Two sets of working registers • External and timer interrupts • Two test inputs • Built-in 8-bit timer counter • Extendable external memory and I/O ports • I/O port Input-output port : 2 ports ¥ 8 bits Data bus input-output port : 1 port ¥ 8 bits • Single-step execution function • Wide range of operating voltage, from + 2.5 V to + 6 V of VCC • High noise margin action • Compatible with Intel's 8048, 8049 and 8050 • Package 40-pin plastic DIP (DIP40-P-600-2.54) : (MSM80C48-¥¥¥RS) (MSM80C49-¥¥¥RS) (MSM80C50-¥¥¥RS) (MSM80C35RS) (MSM80C39RS) (MSM80C40RS) 44-pin plastic QFP(QFP44-P-910-0.80-2K) : (MSM80C48-¥¥¥GS-2K) (MSM80C49-¥¥¥GS-2K) (MSM80C50-¥¥¥GS-2K) (MSM80C35GS-2K) (MSM80C39GS-2K) (MSM80C40GS-2K) ¥¥¥ indicates the code number. 1/20
(PORT 2)
8
PORT2 BUS BUFFER 2 or 3
BLOCK DIAGRAM
PORT2 LATCH (LOW4) AND EXPANDER PORT I/O
PORT2 LATCH (HIGH4)
8
HIGHER PROGRAM COUNTER (4)
4
PROGRAM MEMORY (ROM) 1K¥8bits MSM80C48RS 2K¥8bits MSM80C49RS 4K¥8bits MSM80C50RS
INSTRUCTION REGISTER
PLA
¡ Semiconductor
4
4
OSC FREQ
∏480
TEST1
TIMER/EVENT COUNTER (8)
LOWER PROGRAM COUNTER (8)
BUS LATCH AND LOW PC TEMP REGISTER
BUS BUFFER
8
(DATA BUS PORT)
(8)
ACCUMULATOR (8)
TEMP REG (8)
FLAGS
MULTIPLEXER
ACCUMULATOR LATCH (8)
ARITHMETIC LOGIC UNIT (8)
CONDITIONAL BRANCH LOGIC
TEST0 RAM ADDRESS TEST1 REGISTER INT FLAG0 FLAG1 TIMER FLAG CARRY ACC
REGISTER 0 REGISTER 1 REGISTER 2 REGISTER 3 REGISTER 4 REGISTER 5 REGISTER 6 REGISTER 7
DECODER
8-LEVEL STACK OPTIONAL SECOND REGISTER BANK DATA STORE
ACC Bit TEST
DECIMAL ADJUST
PORT1 BUS BUFFER AND LATCH
8
(PORT 1)
CONTROL AND TIMING
ALE
READ STROBE WRITE STROBE
INT
RESET PROG
EA
XTAL1 XTAL2
PSEN
SS
RD
WR DATA MEMORY (RAM) 64¥8 bits MSM80C48RS 128¥8 bits MSM80C49RS 256¥8 bits MSM80C50RS
MSM80C48/49/50, MSM80C35/39/40
INTERRUPT
OSCILLATOR PROM/ PROGRAM XTAL EXPANDER MEMORY STROBE ENABLE ADDRESS LATCH, SINGLE INITIALIZE CPU MEMORY DATA LATCH STEP SEPARATE STROBE CYCLE CLOCK
2/20
¡ Semiconductor
MSM80C48/49/50, MSM80C35/39/40
PIN CONFIGURATION (TOP VIEW)
37 DB7
36 DB6
35 DB5
XTAL1 XTAL2 RESET SS INT EA RD PSEN WR ALE
2 3 4 5 6 7 8 9 10 11
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
T1 P27 P26 P25 P24 P17 P16 P15 P14 P13 P12 P11 P10 VDD PROG P23 P22 P21 P20 VDD P10 P11 P12 P13 P14 P15 NC P16 1 2 3 4 5 6 7 8 9
34 DB4
33 DB3 32 DB2 31 DB1 30 DB0 29 ALE 28 WR 27 PSEN 26 RD 25 EA 24 INT 23 SS
42 P23
41 P22
40 P21 T1 16
39 P20 VCC 17
DB0 12 DB1 13 DB2 14 DB3 15 DB4 16 DB5 17 DB6 18 DB7 19 VSS 20
P17 10 P24 11
NC 12
P25 13
P26 14
P27 15
T0 18
38 VSS
44 NC
T0
1
40
VCC
43 PROG XTAL1 19
XTAL2 20
NC 21
NC: No-connection pin 40-Pin Plastic DIP 44-Pin Plastic QFP
RESET 22
3/20
¡ Semiconductor
MSM80C48/49/50, MSM80C35/39/40
PIN DESCRIPTIONS
Symbol P10-P17 (PORT 1) P20-P27 (PORT 2) Type I/O I/O Description 8-bit quasi-bidirectional port 8-bit quasi-bidirectional port The high-order four bits of external program memory addresses can be output from P2.0-P2.3, to which the I/O expander MSM82C43RS may also be connected. Bidirectional port The low-order eight bits of external program memory address can be output from this port, and the addressed instruction is fetched under the control of PSEN signal. Also, the external data memory address is output, and data is read and written synchronously using RD and WR signals. The port can also serve as either a statically latched output port or a non-latching input port. The input can be tested with the conditiona.