Document
82C86H
March 1997
CMOS Octal Bus Transceiver
Description
The Intersil 82C86H is a high performance CMOS Octal Transceiver manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The 82C86H provides a full eight-bit bi-directional bus interface in a 20 lead package. The Transmit (T) control determines the data direction. The active low output enable (OE) permits simple interface to the 80C86, 80C88 and other microprocessors. The 82C86H has gated inputs, eliminating the need for pull-up/pull-down resistors and reducing overall system operating power dissipation.
Features
• Full Eight Bit Bi-Directional Bus Interface • Industry Standard 8286 Compatible Pinout • High Drive Capability - B Side IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA - A Side IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mA • Three-State Outputs • Propagation Delay . . . . . . . . . . . . . . . . . . . . . 35ns Max. • Gated Inputs - Reduce Operating Power - Eliminate the Need for Pull-Up Resistors • Single 5V Power Supply • Low Power Operation . . . . . . . . . . . . . . . ICCSB = 10µA • Operating Temperature Range - C82C86H . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC - I82C86H . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC - M82C86H . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Ordering Information
PART NUMBER 5MHz CP82C86H-5 IP82C86H-5 CS82C86H-5 IS82C86H-5 CD82C86H-5 ID82C86H-5 MD82C86H-5/B 59628757701RA MR82C86H-5/B 596287577012A 8MHz PACKAGE TEMP. RANGE 0oC to +70oC -40oC 0oC to +85oC PKG. NO. E20.3 E20.3 N20.35 N20.35 F20.3
CP82C86H 20 Ld PDIP IP82C86H CS82C86H 20 Ld PLCC IS82C86H CD82C86H 20 Ld CERDIP ID82C86H SMD # 20 Pad CLCC SMD #
to
+70oC +85oC
-40oC 0oC
to
to
+70oC
-40oC to +85oC F20.3 -55oC to +125oC F20.3 F20.3 -55oC to +125oC J20.A J20.A
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
File Number
2977.1
4-317
82C86H Pinouts
82C86H (PDIP, CERDIP) TOP VIEW 82C86H (PLCC, CLCC) TOP VIEW
VCC
TRUTH TABLE T X OE H L L A Hi-Z I O B Hi-Z O I
A2
A1
A0
B0
A0 1 A1 2 A2 3 A3 4 A4 5 A5 6 A6 7 A7 8 OE 9 GND 10
20 VCC 19 B0 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 11 T A3 4 A4 5 A5 6 A6 7 A7 8
H L
18 B1 17 B2 16 B3 15 B4 14 B5
3
2
1
20
19
H L I O X Hi-Z
= Logic One = Logic Zero = Input Mode = Output Mode = Don’t Care = High Impedance PIN NAMES
PIN
9 OE 10 GND 11 T 12 B7 13 B6
DESCRIPTION Local Bus Data I/O Pins System Bus Data I/O Pins Transmit Control Input Active Low Output Enable
A0-A7 B0-B7 T OE
4-318
82C86H Functional Diagram
A0 B0
Decoupling Capacitors
The transient current required to charge and discharge the 300pF load capacitance specified in the 82C86H/87H data sheet is determined by:
I = C L ( dv ⁄ dt ) (EQ. 1)
A1 A2 A3 A4 A5 A6 A7
B1 B2 B3 B4 B5 B6 B7
Assuming that all outputs change s.