Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14512B 8-Channel Data Selector
The MC14512B is an 8–channel data selector constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. This data selector finds primary application in signal multiplexing functions. It may also be used for data routing, digital signal switching, signal gating, and number sequence generation. • • • • • Diode Protection on All Inputs Single Supply Operation 3–State Output (Logic “1”, Logic “0”, High Impedance) Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range
L SUFFIX CERAMIC CASE 620
P SUFFIX PLASTIC CASE 648
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol VDD Parameter DC Supply Voltage Value Unit V V mA mW – 0.5 to + 18.0 Vin, Vout Iin, Iout PD Tstg TL Input or Output Voltage (DC or Transient) Input or Output Current (DC or Transient), per Pin Power Dissipation, per Package† Storage Temperature Lead Temperature (8–Second Soldering) – 0.5 to VDD + 0.5 ± 10 500 – 65 to + 150 260
D SUFFIX SOIC CASE 751B
ORDERING INFORMATION
MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC
TA = – 55° to 125°C for all packages.
_C _C
PIN ASSIGNMENT
X0 X1 X2 X3 X4 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD DIS Z C B A INH X7
* Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
TRUTH TABLE
C 0 0 0 0 1 1 1 1 X X B 0 0 1 1 0 0 1 1 X X A 0 1 0 1 0 1 0 1 X X Inhibit 0 0 0 0 0 0 0 0 1 X Disable 0 0 0 0 0 0 0 0 0 1 Z X0 X1 X2 X3 X4 X5 X6 X7 0 High Impedance
X5 X6 VSS
X = Don’t Care
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.
v
v
REV 3 1/94
©MC14512B Motorola, Inc. 1995 370
MOTOROLA CMOS LOGIC DATA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic Output Voltage Vin = VDD or 0 “0” Level Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 VIH 5.0 10 15 IOH Source 5.0 5.0 10 15 IOL 5.0 10 15 15 — 5.0 10 15 5.0 10 15 – 3.0 – 0.64 – 1.6 – 4.2 0.64 1.6 4.2 — — — — — — — — — — — — ± 0.1 — 5.0 10 20 – 2.4 – 0.51 – 1.3 – 3.4 0.51 1.3 3.4 — — — — — – 4.2 – 0.88 – 2.25 – 8.8 0.88 2.25 8.8 ± 0.00001 5.0 0.005 0.010 0.015 — — — — — — — ± 0.1 7.5 5.0 10 20 – 1.7 – 0.36 – 0.9 – 2.4 0.36 0.9 2.4 — — — — — — — — — — — — ± 1.0 — 150 300 600 mAdc 3.5 7.0 11 — — — 3.5 7.0 11 2.75 5.50 8.25 — — — 3.5 7.0 11 — — — mAdc Min — — — 4.95 9.95 14.95 — — — – 55_C 25_C 125_C Max 0.05 0.05 0.05 — — — 1.5 3.0 4.0 Min — — — 4.95 9.95 14.95 — — — Typ # 0 0 0 5.0 10 15 2.25 4.50 6.75 Max 0.05 0.05 0.05 — — — 1.5 3.0 4.0 Min — — — 4.95 9.95 14.95 — — — Max 0.05 0.05 0.05 — — — 1.5 3.0 4.0 Vdc Unit Vdc “1” Level Vin = 0 or VDD Input Voltage “0” Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) “1” Level (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Input Current Input Capacitance (Vin = 0) Quiescent Current (Per Package) Total Supply Current**† (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) Three–State Leakage Current VIL VOH Vdc
Vdc
Sink
Iin Cin IDD
µAdc pF µAdc
IT
IT = (0.8 µA/kHz) f + IDD IT = (1.6 µA/kHz) f + IDD IT = (2.4 µA/kHz) f + IDD
µAdc
ITL
15
—
± 0.1
—
± 0.0001
± 0.1
—
± 3.0
µAdc
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. ** The formulas given are for the typical characteristics only at 25_C.
ā
†To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL – 50) Vfk where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001.
MOTOROLA CMOS LOGIC DATA
MC14512B 371
SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_C, See Figure 1)
All Types Characteristic Output Rise and Fall Time tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns Propagation Delay Time (Figure 2) Inhibit, Control, or Data to Z Symbol tTLH, tTHL VDD 5.0 10 15 5.0 10 15 t.