MFR4200

MFR4200 Data Sheet FlexRay Communication Controllers MFR4200 Rev. 1 12/2006 freescale.com MFR4200 Data Sheet MFR4200 Rev. 1 12/2006 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify that you have the latest information available, refer to http://www.freescale.com The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Revision History Date 08/2005 12/2006 Revision Level Description Page Number(s) 0 Initial release. N/A 1 Updated the following sections to remove information relating to clock quality 231 check block: 231 A.3.1.1, “POR” 231 A.3.1.2, “LVR” 231 A.3.1.3, “External Reset” 232 Table A-11 Table A-12 Updated Figure B-1, Figure B-2, and Figure B-3 with latest drawings to comply 239, 240, 241 with Jedec specifications. Applied latest version of back page. MFR4200 Data Sheet, Rev. 1 4 Freescale Semiconductor Introduction Device Overview MFR4200 FlexRay Communication Controller Dual Output Voltage Regulator (VREG3V3V2) Clocks and Reset Generator Oscillator (OSCV2) Electrical Characteristics Package Information Printed Circuit Board Layout Recommendations MFR4200 Protocol Implementation Document Index of Registers MFR4200 Data Sheet, Rev. 1 Freescale Semiconductor 5 MFR4200 Data Sheet, Rev. 1 ...