SSR1N50B

SSR1N50B / SSU1N50B SSR1N50B / SSU1N50B 520V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supplies, power factor correction and electronic lamp ballasts based on half bridge. Features 1.3A, 520V, RDS(on) = 5.3Ω @VGS = 10 V Low gate charge ( typical 8.3 nC) Low Crss ( typical 5.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability D D ! ● ◀ ▲ ● ● G S D-PAK SSR Series I-PAK G D S SSU Series G! ! S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) SSR1N50B / SSU1N50B 520 1.3 0.82 5.0 ± 30 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V mJ A mJ V/ns W W W/°C °C °C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * Power Dissipation (TC = 25°C) 100 1.3 2.6 5.5 2.5 26 0.21 -55 to +150 300 TJ, Tstg TL - Derate above 25°C Operating and Storage Temperature Range Maximum...