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ST6225C Dataheets PDF



Part Number ST6225C
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description 8-BIT MCUs
Datasheet ST6225C DatasheetST6225C Datasheet (PDF)

ST6215C ST6225C 8-bit MCUs with A/D converter, two timers, oscillator safeguard & safe reset ■ Memories – 2K or 4K bytes Program memory (OTP, EPROM, FASTROM or ROM) with read-out protection – 64 bytes RAM ■ Clock, Reset and Supply Management – Enhanced reset system – Low Voltage Detector (LVD) for Safe Reset – Clock sources: crystal/ceramic resonator or RC network, external clock, backup oscillator (LFAO) – Oscillator Safeguard (OSG) – 2 Power Saving Modes: Wait and Stop ■ Interrupt Management .

  ST6225C   ST6225C



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ST6215C ST6225C 8-bit MCUs with A/D converter, two timers, oscillator safeguard & safe reset ■ Memories – 2K or 4K bytes Program memory (OTP, EPROM, FASTROM or ROM) with read-out protection – 64 bytes RAM ■ Clock, Reset and Supply Management – Enhanced reset system – Low Voltage Detector (LVD) for Safe Reset – Clock sources: crystal/ceramic resonator or RC network, external clock, backup oscillator (LFAO) – Oscillator Safeguard (OSG) – 2 Power Saving Modes: Wait and Stop ■ Interrupt Management – 4 interrupt vectors plus NMI and RESET – 20 external interrupt lines (on 2 vectors) – 1 external non-interrupt line ■ 20 I/O Ports – 20 multifunctional bidirectional I/O lines – 16 alternate function lines – 4 high sink outputs (20mA) ■ 2 Timers – Configurable watchdog timer – 8-bit timer/counter with a 7-bit prescaler ■ Analog Peripheral – 8-bit ADC with 16 input channels ■ Instruction Set – 8-bit data manipulation – 40 basic instructions – 9 addressing modes – Bit manipulation Device Summary Features Program memory - bytes RAM - bytes Operating Supply Clock Frequency Operating Temperature Packages ST6215C 2K PDIP28 S028 SS0P28 CDIP28W (See Section 12.5 for Ordering Information) ■ Development Tools – Full hardware/software development package 64 3.0V to 6V 8MHz Max -40°C to +125°C PDIP28 / SO28 / SSOP28 ST6225C 4K January 2009 Rev 4 1/105 1 Table of Contents 1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 MEMORY MAPS, PROGRAMMING MODES AND OPTION BYTES . . . . . . . . . . . . . . . . . . . . . . 9 3.1 MEMORY AND REGISTER MAPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.2 Program Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.3 Readout Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.4 Data Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.5 Stack Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.6 Data ROM Window Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 PROGRAMMING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.2.1 Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.2.2 EPROM Erasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


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