(HCTL20xx) Quadrature Decoder/Counter Interface ICs
H
Quadrature Decoder/Counter Interface ICs Technical Data
HCTL-2000 HCTL-2016 HCTL-2020
Features
• Interfaces Encoder ...
Description
H
Quadrature Decoder/Counter Interface ICs Technical Data
HCTL-2000 HCTL-2016 HCTL-2020
Features
Interfaces Encoder to Microprocessor 14 MHz Clock Operation Full 4X Decode High Noise Immunity: Schmitt Trigger Inputs Digital Noise Filter 12 or 16-Bit Binary Up/ Down Counter Latched Outputs 8-Bit Tristate Interface 8, 12, or 16-Bit Operating Modes Quadrature Decoder Output Signals, Up/Down and Count Cascade Output Signals, Up/ Down and Count Substantially Reduced System Software
Applications
Interface Quadrature Incremental Encoders to Microprocessors Interface Digital Potentiometers to Digital Data Input Buses
Description
The HCTL-2000, 2016, 2020 are CMOS ICs that perform the quadrature decoder, counter, and bus interface function. The HCTL-20XX family is designed to improve system performance
Devices
Part Number HCTL-2000 HCTL-2016 HCTL-2020 Description 12-bit counter. 14 MHz clock operation. All features of the HCTL-2000. 16-bit counter. All features of the HCTL-2016. Quadrature decoder output signals. Cascade output signals. Package Drawing A A B
ESD WARNING: Standard CMOS handling precautions should be observed with the HCTL-20XX family ICs.
5965-5894E
2-178
in digital closed loop motion control systems and digital data input systems. It does this by shifting time intensive quadrature decoder functions to a cost effective hardware solution. The entire HCTL-20XX family consists of a 4x quadrature decoder, a binary up/down state counter,
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