Document
® MOTOROLA
MC146818
Advance Information
CMOS
REAL-TIME CLOCK PLUS RAM (RTC)
(HIGH-PERFORMANCE SILICON-GATE COMPLEMENTARY MOS)
The MC146818 Real-Time Clock plus RAM is a peripheral device which includes the unique MOTEL concept for use with various microprocessors, microcomputers, and larger computers. This part
REAL-TIME CLOCK PLUS RAM
combines three unique features: a complete time-of-day clock with
alarm and one hundred year calendar, a programmable periodic inter-
rupt and square-wave generator, and 50 bytes of low-power static
RAM. The MC146818 uses high-speed CMOS technology to interface
I with 1 MHz processor buses, while consuming very little power. The Real-Time Clock plus RAM has two distinct uses. First, it is designed as a battery powered CMOS part (in an otherwise NMOSITTL system) including all the common battery backed-up functions such as
L SUFFIX CERAMIC PACKAGE
CASE 716
RAM, time, and calendar. Secondly, the MC146818 may be used with a
CMOS microprocessor to relieve the software of the timekeeping
workload and to extend the available RAM of an MPU such as the MC146805E2.
P SUFFIX PLASTIC PACKAGE
• Low-Power, High-Speed, High-Density CMOS
CASE 709
• Internal Time Base and Oscillator
• Counts Seconds, Minutes, and Hours of the Day
• Counts Days of the Week, Date, Month, and Year
• 3 V to 6 V Operation • Time Base Input Options: 4.194304 MHz, 1.048576 MHz, or
32.768 kHz
S SUFFIX CERDIP PACKAGE
CASE 623
• Time Base Oscillator for Parallel Resonant Crystals
• 40 to 200 p.W Typical Operating Power at Low Frequency Time Base
• 4.0 to 20 mW Typical Operating Power at High Frequency Time Base
• Binary or BCD Representation of Time, Calendar, and Alarm
Z SUFFIX CHIP CARRIER
CASE 761
• 12- or 24-Hour Clock with AM and PM in 12-Hour Mode
• Daylight Savings Time Option
• Automatic End of Month Recognition • Automatic Leap Year Compensation
PIN ASSIGNMENT
• Microprocessor Bus Compatible • MOTEL Circuit for Bus Universality • Multiplexed Bus for Pin Efficiency • Interfaced with Software as 64 RAM Locations
NC OSC1 OSC2
(3) 3 (4)
(38) 23 (37) 22
VDD SOW PS
• 14 Bytes of Clock and Control Registers
ADO
(8)
(34) 21 CKOUT
• 50 Bytes of General Purpose RAM • Status Bit Indicates Data Integrity • Bus Compatible Interrupt Signals (IRQ) • Three Interrupts are Separately Software Maskable and Testable
AD1 AD2 AD3
(9) (10) (11)
CKFS
(32) 19 iFill
(31)18 RESET
Time-of-Day Alarm, Once-per-Second to Once-per-Day
AD4 8 (12)
(30) 17 DS
Periodic Rates from 30.5 p.s to 500 ms End-of-Clock Update Cycle • Programmable Square-Wave Output Signal • Clock Output May Be Used as Microprocessor Clock Input At Time Base Frequency + 1 or +4 • 24-Pin Dual-In-Line Package
AD5
(13)
AD6 AD7
10 (18) 11 (19)
VSS 12 (20)
NC R/W AS
a
• Chip Carrier Also Available
Pin numbers in parentheses represent equivalent Z suffix chip carrier pins. Pins that have not been designated for the chip carrier are not connected.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
3-996
MC146818
OSC1 OSC2
FIGURE 1 - BLOCK DIAGRAM
CKOUT CKFS
VDD -----.
VSS ----+-
Bus Interface
Clock/ Calendar Update
BCD/ Binary Increment
Clock, Alarm, Calendar RAM
110 Bytes)
User RAM 150 Bytes)
SOW
IRQ RESET PS
I
MAXIMUM RATINGS (Voltages referenced to VSSI
Ratings
Symbol
Value
Supply Voltage All Input Voltages Except OSC1
VDD Vin
-0.3 to +8.0 VSS-05 to VDD+0.5
Current Drain per Pin Excluding VDD and VSS
I
10
Operating Temperature Range MC146818 MC146818C (VDD = 3.0 to 5.5 V operation)
TA
TL to TH
o to 70
-40 to 85
Storage Temperature Range
Tstg - 55 to + 150
Unit V V mA
°C °C
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance Plastic Cerdip Ceramic
Symbol Value Unit
120 ()JA 65 °C/W
50
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSSslVin or Voutl s VDD. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level le.g., either VSS or VDDI
3-997
MC146818
I
DC ELECTRICAL CHARACTERISTICS (VDD=3 Vde VSS=O Vde TA=TL to TH unless otherwise noted I
Characteristics
Symbol
Min
Frequency of Operation Output Voltage
fose VOL
32.768 -
ILoad<10,..A
VOH VDD-01
100 - Bus Idle CKOUT=fose, CL = 15 pF; SQW Disabled, CE=VDD-0.2; CL (OSC21= 10 pF fose= 32.768 kHz
100 - Quiescent fose= DC; OSC1 = DC; All Other Inputs=VDD-0.2 V; No Cloek
1003 1004
-
Output High Voltage ILLoad= -0.25 mA. All Outputsl
VOH
2.7
Output Low Voltage (ILoad=025 mA, All Outputsl
Input High Voltage
ADO-AD7, OS, AS, R/W, CE, RESET, CKF.