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SY10E241 Dataheets PDF



Part Number SY10E241
Manufacturers Micrel Semiconductor
Logo Micrel Semiconductor
Description 8-BIT SCANNABLE REGISTER
Datasheet SY10E241 DatasheetSY10E241 Datasheet (PDF)

Micrel, Inc. 8-BIT SCANNABLE REGISTER SY10E241 SY1S0YE10204E1241 SY100E241 FEATURES s 1000ps max. CLK to output s Extended 100E VEE range of –4.2V to –5.5V s SHIFT overrides HOLD, /LOAD control s Asynchronous Master Reset s Pin-compatible with E141 s Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75KΩ input pulldown resistors s Fully compatible with Motorola MC10E/100E241 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E241 are 8-bit shiftable registers d.

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Micrel, Inc. 8-BIT SCANNABLE REGISTER SY10E241 SY1S0YE10204E1241 SY100E241 FEATURES s 1000ps max. CLK to output s Extended 100E VEE range of –4.2V to –5.5V s SHIFT overrides HOLD, /LOAD control s Asynchronous Master Reset s Pin-compatible with E141 s Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75KΩ input pulldown resistors s Fully compatible with Motorola MC10E/100E241 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E241 are 8-bit shiftable registers designed for use in new, high-performance ECL systems. Unlike the E141, the E241 features internal data feedback organized such that the SHIFT control overrides the HOLD, /LOAD control. Thus, the normal operations of HOLD and LOAD can be toggled with a single control line without the need for external gating. This configuration also enables switching to scan mode with the single SHIFT control line. The eight inputs D0–D7 accept parallel input data, while S-IN accepts serial input data when in shift mode. Data is accepted a set-up time before the rising edge of CLK. Shifting is also accomplished on the rising clock edge. A HIGH on the Master Reset pin (MR) asychronously resets all the registers to zero. BLOCK DIAGRAM S-IN D0 D1 – D6 BITS 1-6 DQ R DQ R Q0 Q1 – Q6 PIN NAMES Pin D0–D7 S-IN SEL0 SEL1 CLK MR Q0–Q7 VCCO Function Parallel Data Inputs Serial Data Input SHIFT Control HOLD, /LOAD Control Clock Master Reset Data Outputs VCC to Output D7 SEL1 (HOLD/LOAD) SEL0 (SHIFT) CLK MR DQ R Q7 M9999-032206 [email protected] or (408) 955-1690 1 Rev.: F Amendment: /0 Issue Date: December 2005 Micrel, Inc. SY10E241 SY100E241 PACKAGE/ORDERING INFORMATION SEL1 CLK MR VEE S-IN D0 D1 SEL0 NC D7 D6 D5 VCCO Q7 25 24 23 22 21 20 19 26 18 27 17 28 TOP VIEW 16 1 PLCC 15 J28-1 2 14 3 13 4 12 5 6 7 8 9 10 11 D2 D3 D4 VCCO Q0 Q1 Q2 28-Pin PLCC (J28-1) Ordering Information(1) Q6 Q5 VCC NC VCCO Q4 Q3 Part Number SY10E241JC SY10E241JCTR(2) SY100E241JC SY100E241JCTR(2) SY10E241JZ(3) SY10E241JZTR(2, 3) SY100E241JZ(3) SY100E241JZTR(2, 3) Package Type J28-1 J28-1 J28-1 J28-1 J28-1 J28-1 J28-1 J28-1 Operating Range Package Marking Commercial SY10E241JC Commercial Commercial SY10E241JC SY100E241JC Commercial SY100E241JC Commercial SY10E241JZ with Pb-Free bar-line indicator Commercial SY10E241JZ with Pb-Free bar-line indicator Commercial SY100E241JZ with Pb-Free bar-line indicator Commercial SY100E241JZ with Pb-Free bar-line indicator Lead Finish Sn-Pb Sn-Pb Sn-Pb Sn-Pb Matte-Sn Matte-Sn Matte-Sn Matte-Sn Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. M9999-032206 [email protected] or (408) 955-1690 2 Micrel, Inc. TRUTH TABLE SEL0 L L H SEL1 L H X Function Load Hold Shift (Dn to Dn+1) SY10E241 SY100E241 DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0°C TA = +25°C TA = +85°C Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. IIH Input HIGH Current — — 150 — — 150 — — 150 IEE Power Supply Current 10E — 125 150 — 125 150 — 125 150 100E — 125 150 — 125 150 — 144 173 Unit µA mA Condition — — AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND Symbol Parameter TA = 0°C TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit fSHIFT Max. Shift Frequency 700 900 — 700 900 — 700 900 — MHz tPD Propagation Delay to Output ps CLK 625 750 975 625 750 975 625 750 975 MR 600 725 975 600 725 975 600 725 975 tS Set-up Time D SEL0 (SHIFT)350 SEL1 (HOLD/LOAD) S-IN 175 25 — 175 25 — 175 25 200 — 350 200 — 350 200 — 400 250 — 400 250 — 400 250 125 –100 — 125 –100 — 125 –100 — — — ps tH Hold Time D SEL0 (SHIFT) SEL1 (HOLD/LOAD) S-IN 200 –25 — 200 –25 — 200 –25 — 100 –200 — 100 –200 — 100 –200 — 50 –250 — 50 –250 — 50 –250 — 300 100 — 300 100 — 300 100 — ps tRR Reset Recovery Time 900 600 — 900 600 — 900 600 — ps tPW Minimum Pulse Width CLK, MR 400 — — 400 — — 400 — — ps tskew Within-Device Skew — 60 — — 60 — — 60 — ps tr Rise/Fall Time tf 20% to 80% 300 525 800 300 525 800 300 525 800 ps Note: 1. Within-device skew is defined as identical transitions on similar paths through a device. Condition — — — — — — 1 — M9999-032206 [email protected] or (408) 955-1690 3 Micrel, Inc. 28-PIN PLCC (J28-1) SY10E241 SY100E241 Rev. 03 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time witho.


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