Micrel, Inc.
3-BIT DIFFERENTIAL FLIP-FLOP
SY10E431
SY1S0YE14003E1431
SY100E431
FEATURES
s Differential D, clock and Q s Extended 100E VEE range of –4.2V to –5.5V s VBB output for single-ended use s 1100MHz min. toggle frequency s Edge-triggered asynchronous set and reset s Fully compatible with Motorola MC10E/100E431 s Available in 28-pin PLCC package
BLOCK DIAGRAM
S0
D0 D0 CLK0 CLK0
R0 S1
D1 D1 CLK1 CLK1
R1 S2
D2 D2 CLK2 CLK2
R2
S DQ
Q R
S DQ
Q R
S DQ
Q R
VBB
Q0 Q0
Q1 Q1
Q2 Q2
DESCRIPTION
The SY10/100E431 are 3-bit flip-flops with differential clock, data input and data output.
The asynchronous Set and Reset controls are edgetriggered rather than level controlled. This allows the user to rapidly set or reset the flip-flop and then continue clocking at the next clock edge without the necessity of de-asserting the set/reset signal (as would be the case with a level controlled set/reset).
The E431 is also designed with larger internal swings, an approach intended to minimize the time spent crossing the threshold region and thus reduces the metastability susceptibility window.
PIN NAMES
Pin D[0:2], D[0:2] CLK[0:2], CLK[0:2] S[0:2] R[0:2] VBB Q[0:2], Q[0:2] VCCO
Function Differential Data Inputs Differential Clock Inputs Edge Triggered Set Inputs Edge Triggered Reset Inputs VBB Reference Output Differential Data Outputs VCC to Output
TRUTH TABLE(1)
Dn CLKn LZ HZ XL XL NOTE: 1. Z = LOW-to-HIGH transition.
Rn L L Z L
Sn L L L Z
Qn L H L H
M9999-032206
[email protected] or (408) 955-1690
1
Rev.: E Amendment: /0 Issue Date: March 2006
Micrel, Inc.
SY10E431 SY100E431
PACKAGE/ORDERING INFORMATION
CLK1 CLK1
R1 VEE
S1 D1 D1
VBB CLK2 CLK2 D2 D2 R2 S2
25 24 23 22 21 20 19
26 18
27 17
28 TOP VIEW 16
1
PLCC
15
2
J28-1
14
3 13
4 12 5 6 7 8 9 10 11
CLK0 CLK0
D0 D0 R0 S0 VCCO
28-Pin PLCC (J28-1)
Ordering Information(1)
Part Number
Package Operating
Type
Range
Package Marking
Lead Finish
Q2 SY10E431JC Q2 SY10E431JCTR(2) VCC SY100E431JC Q1 SY100E431JCTR(2)
Q1
Q0 SY10E431JZ(3)
Q0
SY10E431JZTR(2, 3)
SY100E431JZ(3)
J28-1 J28-1 J28-1 J28-1 J28-1
J28-1
J28-1
Commercial Commercial Commercial Commercial Commercial
Commercial
Commercial
SY10E431JC
SY10E431JC SY100E431JC
SY100E431JC
SY10E431JZ with Pb-Free bar-line indicator
SY10E431JZ with Pb-Free bar-line indicator
SY100E431JZ with Pb-Free bar-line indicator
Sn-Pb Sn-Pb Sn-Pb Sn-Pb Matte-Sn
Matte-Sn
Matte-Sn
SY100E431JZTR(2, 3) J28-1 Commercial
SY100E431JZ with
Matte-Sn
Pb-Free bar-line indicator
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs.
M9999-032206
[email protected] or (408) 955-1690
2
Micrel, Inc.
SY10E431 SY100E431
DC ELECTRICAL CHARACTERISTICS
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
Symbol
Parameter
TA = 0°C
TA = +25°C
TA = +85°C
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
VBB Output Reference Voltage
V
10E –1.38 — –1.27 –1.35 — –1.25 –1.31 — –1.19
100E –1.38 — –1.26 –1.38 — –1.26 –1.38 — –1.26
IIH Input HIGH Current
— — 150 — — 150 — — 150 µA
IEE Power Supply Current
mA
10E — 110 132 — 110 132 — 110 132
100E — 110 132 — 110 132 — 127 152
VCMR Common Mode Range
–1.5 — 0 –1.5 — 0 –1.5 — 0
V
Condition —
— —
1
Notes:
1. VCMR is referenced to the most positive side of the differential input signal. Normal operation is obtained when the input signals are within the VCMR range and the input swing is greater than VPP (min.) and <1V.
AC ELECTRICAL CHARACTERISTICS
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
TA = 0°C
Symbol
Parameter
Min. Typ. Max.
fMAX
Max. Toggle Frequency
1100 1400 —
tPD Propagation Delay to Output
CLK (Diff)
450 600 750
CLK (SE)
400 600 800
R 550 725 925
S 550 725 925
tS Set-up Time D R S
200 1000 1000
0 700 700
— — —
TA = +25°C Min. Typ. Max. 1100 1400 —
450 600 750 400 600 800 550 725 925 550 725 925
200 1000 1000
0 700 700
— — —
TA = +85°C Min. Typ. Max. 1100 1400 —
450 600 750 400 600 800 550 725 925 550 725 925
200 1000 1000
0 700 700
— — —
Unit MHz ps
ps
Condition — —
1 1
tH Hold Time, D
tPW Minimum Pulse Width, CLK
tskew
Within-Device Skew
VPP (AC) Minimum Input Swing
tr Rise/Fall Time tf 20% to 80%
200 0 — 200 0 — 200 0 — ps 400 — — 400 — — 400 — — ps — 50 — — 50 — — 50 — ps 150 — — 150 — — 150 — — mV 275 450 650 275 450 650 275 450 650 ps
— — 2 3 —
Notes: 1. These set-up times define the minimum time the CLK or SET/RESET input must wait after the assertion of the RESET/SET input to assure the proper
operation of the flip-flop. 2. Within-device skew is defined as identical transitions on similar paths through a device. 3. Minimum input swing for which AC parameters are guaranteed.
M9999-032206
[email protected] or (408) 955-1.