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SY10E193 Dataheets PDF



Part Number SY10E193
Manufacturers Micrel Semiconductor
Logo Micrel Semiconductor
Description ERROR DETECTION/ CORRECTION CIRCUIT
Datasheet SY10E193 DatasheetSY10E193 Datasheet (PDF)

Micrel, Inc. ERROR DETECTION/ CORRECTION CIRCUIT SY10E193 SY1S0YE10109E3193 SY100E193 FEATURES s Hamming code generation s Extended 100E VEE range of –4.2V to –5.5V s 8-bit wide s Expandable for more width s Provides parity register s Fully compatible with industry standard 10KH, 100K ECL levels s Internal75KΩ input pulldown resistors s Fully compatible with Motorola MC10E/100E193 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E193 are error detection and correction (EDAC) circui.

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Micrel, Inc. ERROR DETECTION/ CORRECTION CIRCUIT SY10E193 SY1S0YE10109E3193 SY100E193 FEATURES s Hamming code generation s Extended 100E VEE range of –4.2V to –5.5V s 8-bit wide s Expandable for more width s Provides parity register s Fully compatible with industry standard 10KH, 100K ECL levels s Internal75KΩ input pulldown resistors s Fully compatible with Motorola MC10E/100E193 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E193 are error detection and correction (EDAC) circuits designed for use in new, high- performance ECL systems. The E193 generates hamming parity codes on an 8-bit word as shown in the block diagram. The P5 output gives the parity of the whole word. PGEN provides word parity after Odd/Even parity control and gating with the BPAR input. PGEN also feeds into a 1-bit shiftable register for use as part of a scan ring. The combinatorial part of the device generates the same code pattern as the Motorola MC10193. Used in conjunction with 12-bit parity generators, such as the E160, a SECDED (single error correction, double error detection) error system can be designed for a multiple of an 8-bit word. PIN NAMES Pin B0–B7 BPAR EV/OD EN HOLD S-IN SHIFT CLK P1–P5 PGEN PARERR/PARERR VCCO Function Check Bit Inputs Check Bit Parity Input Even/Odd Parity Select Parity Enable Syndrome Hold Input Syndrome Bit Input Syndrome Bit Shift Clock Input Parity Output Parity Generate Output Parity Error Output VCC to Output M9999-032006 [email protected] or (408) 955-1690 1 Rev.: F Amendment: /0 Issue Date: March 2006 Micrel, Inc. SY10E193 SY100E193 PACKAGE/ORDERING INFORMATION EV/OD BPAR B0 VEE B1 B2 B3 EN HOLD S-IN SHIFT CLK VCCO PGEN 25 24 23 22 21 20 19 26 18 27 17 28 TOP VIEW 16 1 PLCC 15 2 J28-1 14 3 13 4 12 5 6 7 8 9 10 11 B4 B5 B6 B7 VCCO P1 P2 28-Pin PLCC (J28-1) Ordering Information(1) PARERR PARERR VCC P5 VCCO P4 P3 Part Number SY10E193JC SY10E193JCTR(2) SY100E193JC SY100E193JCTR(2) SY10E193JZ(3) SY10E193JZTR(2, 3) SY100E193JZ(3) SY100E193JZTR(2, 3) Package Operating Type Range J28-1 Commercial J28-1 Commercial J28-1 Commercial J28-1 Commercial J28-1 Commercial J28-1 Commercial J28-1 Commercial J28-1 Commercial Package Marking Lead Finish SY10E193JC Sn-Pb SY10E193JC SY100E193JC Sn-Pb Sn-Pb SY100E193JC Sn-Pb SY10E193JZ with Matte-Sn Pb-Free bar-line indicator SY10E193JZ with Matte-Sn Pb-Free bar-line indicator SY100E193JZ with Matte-Sn Pb-Free bar-line indicator SY100E193JZ with Matte-Sn Pb-Free bar-line indicator Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. M9999-032006 [email protected] or (408) 955-1690 2 Micrel, Inc. BLOCK DIAGRAM B INPUTS 0 36 5 7 42 1 BPAR EV/OD EN HOLD S-IN SHIFT CLK B2, B3, B6, B7 B1, B3, B5, B7 B4, B5, B6, B7 P2 P1 P3 B1, B2, B4, B7 P4 BYTE (B0 – B7) P5 PGEN 00D 11 PARERR PARERR SY10E193 SY100E193 M9999-032.


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