ICS950208

Integrated Circuit Systems, Inc. ICS950208 Programmable Timing Control Hub™ for P4™ Recommended Application: CK-408 clock with driven mode only for Brookdale chipset with P4 processor. Output Features: 3 - Pairs of differential CPU clocks @ 3.3V 4 - 3V66 @ 3.3V 10 - PCI @ 3.3V 1 - 48MHz @ 3.3V fixed 1 - 24_48MHz selectable output @ 3.3V 2 - REF @ 3.3V, 14.318MHz Features/Benefits: Programmable output frequency. Programmable output divider ratios. Programmable output rise/fall time. Programmable output skew. Programmable spread percentage for EMI control. Watchdog timer technology to reset system if system malfunctions. Programmable watch dog safe frequency. Supports I2C Index read/write and block read/write operations. Uses external 14.318MHz crystal. Key Specifications: CPU Output Jitter <150ps 3V66 Output Jitter <250ps CPU Output Skew <100ps Pin Configuration *MULTSEL1/REF1 1 VDDREF 2 X1 3 X2 4 GND 5 *FS2/PCICLK_F0 6 *FS3/PCICLK_F1 7 PCICLK_F2 8 VDDPCI 9 PCICLK1 11 PCICLK2 12 GND 13 PCICLK3 14 PCICLK4 15 PCICLK5 16 PCICLK6 17 VDDPCI 18 Vttpwr_GD# 19 RESET# 20 GND 21 *FS0/48MHz 22 *FS1/24_48MHz 23 AVDD48 24 *FS4/PCICLK0 10 48 REF0/MULTSEL0* 47 GNDREF 46 VDDCPU 45 CPUCLKT2 44 CPUCLKC2 43 GNDCPU 42 PD# 41 CPUCLKT0 40 CPUCLKC0 39 VDDCPU 38 CPUCLKT1 37 CPUCLKC1 36 GNDCPU 35 IREF 34 AVDD 33 GND 32 VDD3V66 31 3V66_0 30 3V66_1 29 GND 28 3V66_2 27 3V66_3 26 SCLK 25 SDATA 48-SSOP * Internal Pull-Up Resistor of 120K to VDD Frequency Table Bit2 ...