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LG Semicon Co.,Ltd.
GM71V64403A GM71VS64403AL
16,777,216 WORDS x 4 BIT CMOS DYNAMIC RAM
Description
The GM71V(S)64403A/AL is the new generation dynamic RAM organized 16,777,216 words by 4bits. The GM71V(S)64403A/AL utilizes advanced CMOS Silicon Gate Process Technology as well as advanced circuit techniques for wide operating margins, both internally and to the system user. System oriented features include single power supply of 3.3V+/-10% tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. The GM71V(S)64403A/AL offers Extended Data Out(EDO) Mode as a high speed access mode.
Pin Configuration 32 SOJ / TSOP II
VCC IO0 IO1 NC NC NC VCC /WE /RAS A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VSS IO3 IO2 NC NC VSS /CAS /OE A12 A11 A10 A9 A8 A7 A6 VSS
Features
* 16,777,216 Words x 4 Bit * Extended Data Out (EDO) Mode Capability * Fast Access Time & Cycle Time (Unit: ns)
A1 A2 A3 A4 A5 VCC
tRAC
GM71V(S)64403A/AL-5 GM71V(S)64403A/AL-6 50 60
tAA
25 30
tCAC
13 15
tRC
84 104
tHPC
20 25
w
w
w
.
t a d
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*Power dissipation - Active : 504mW/432mW(MAX) - Standby : 1.8 mW ( CMOS level : MAX ) 0.54mW ( L-Version : MAX) *EDO page mode capability *Access time : 50ns/60ns (max) *Refresh cycles - RAS only Refresh 8192 cycles/64 §Â (GM71V64403A) 8192 cycles/128§Â (GM71VS64403AL)(L_Version) *CBR & Hidden Refresh 4096 cycles/64 §Â (GM71V64403A) 4096 cycles/128 §Â (GM71VS64403AL)( L-Version ) *4 variations of refresh -RAS-only refresh -CAS-before-RAS refresh -Hidden refresh -Self refresh (L-Version) *Single Power Supply of 3.3V+/-10 % with a built-in VBB generator *Battery Back Up Operation ( L-Version )
(Top View)
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Pin Description
Pin A0-A12 A0-A12 RAS CAS OE Function Address Inputs Refresh Address Inputs Row Address Strobe Column Address Strobe Output Enable Pin WE I/O0 - I/O3 VCC VSS NC
GM71V64403A GM71VS64403AL
Function Write Enable Data Input / Output Power (+3.3V) Ground No Connection
Ordering Information
Type No. GM71V(S)64403A/ALJ-5 GM71V(S)64403A/ALJ-6 GM71V(S)64403A/ALT-5 GM71V(S)64403A/ALT-6 Access Time 50§À 60§À 50§À 60§À Package 400 Mil 32Pin Plastic SOJ 400 Mil 32Pin Plastic TSOP II
Absolute Maximum Ratings*
Symbol TSTG VT VCC IOUT PT Parameter Storage Temperature (Plastic) Voltage on any Pin Relative to VSS Voltage on VCC Relative to VSS Short Circuit Output Current Power Dissipation Rating -55 to 125 -0.5 to VCC + 0.5 (MAX ; 4.6V) -0.5 to 4.6 50 1.0 Unit C V V mA W
*Note : Operation at or above Absolute Maximum Ratings can adversely affect device reliability.
Recommended DC Operating Conditions (TA = 0 ~ 70C)
Symbol VCC VSS VIH VIL TA Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Ambient Temperature under Bias Min 3.0 0 2.0 -0.3 0 Typ 3.3 0 Max 3.6 0 Vcc+0.3 0.8 70 Unit V V V V C Notes 1,2 2 1 1
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GM71V64403A GM71VS64403AL
DC Electrical Characteristics: (VCC = 3.3V+/-10%, TA = 0 ~ 70C)
Symbol VOH VOL ICC1 Parameter Output Level Output Level Voltage (IOUT = -2mA) Output Level Output Level Voltage (IOUT = 2mA) Operating Current (tRC = tRC min) 50ns 60ns ICC2 Standby Current (TTL interface) Power Supply Standby Current (RAS, CAS= VIH, DOUT = High-Z) RAS-Only Refresh Current ( tRC = tRC min) Extended Data Out page Mode Current (RAS = VIL, CAS, Address Cycling: tHPC = tHPC min) CMOS interface (RAS, CAS>=VCC-0.2V, DOUT = High-Z) Standby Current(L_Version) ICC6 CAS-before-RAS Refresh Current (tRC = tRC min) 50ns 60ns 50ns 60ns 50ns 60ns Min 2.4 0 Max VCC 0.4 140 120 2 140 120 110 mA 100 0.5 300 160 140 500 uA 4, 5 mA uA mA 4 1,3 mA 2 mA Unit V V mA 1,2 Note
ICC3
ICC4
ICC5
-
ICC7 ICC8
Battery Back Up Operating Current(Standby with CBR) (tRC=31.25us,tRAS=300ns,Dout=High-Z) Standby Current (CMOS) Power Supply Standby Current RAS = VIH, CAS = VIL , DOUT = Enable Self Refresh Current (RAS, CAS <=0.2V,Dout=High-Z) Input Leakage Current, Any Input (0V<=VIN<=Vcc) Output Leakage Current (DOUT is Disabled, 0V<=VOUT<=Vcc)
-
5
mA
1
ICC9 II(L) IO(L)
-5 -5
400 5 5
uA uA uA
5
Note: 1. ICC depends on output load condition when the device is selected. ICC(max) is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Measured with one sequential address change per EDO cycle, tHPC. 4. VIH>=VCC-0.2V, 0V<=VIL<=0.2V 5. L-Version
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Capacitance (VCC = 3.3V+/-10%, TA = 25C)
Symbol CI1 CI2 CI/O Parameter Input Capacitance (Address) Input Capacitance (Clocks) Output Capacitance (Data-in,Data-Out) Typ -
GM71V64403A GM71VS64403AL
Max 5 7 7 Unit §Ü §Ü §Ü Note 1 1 1, 2
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. RAS, CAS = VIH to disable DOUT.
AC Characteristics (VCC = 3.3V+/-10%, TA = 0 ~ 70C, Notes 1, 2,19)
Test Conditions Input rise and fall times : 2ns Output timing reference levels : VOL/VOH = 0.8/2.0V Inp.