74LS126A

DM74LS126A Quad TRI-STATE Buffer September 1991 DM74LS126A Quad TRI-STATE Buffer General Description This device contains four independent gates each of which performs a non-inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors When disabled both the output transistors are turned off presenting a high-impedance state to the bus line Thus the output will act neither as a significant load nor as a driver To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels the disable time is shorter than the enable time of the outputs Connection Diagram Dual-In-Line Package TL F 6388 – 1 Order Number DM74LS126AM or DM74LS126AN See NS Package Number M14A or N14A Function Table YeA Inputs A L H X H e High Logic Level L e Low Logic Level X e Either Low or High Logic Level Hi-Z e TRI-STATE (Outputs are disabled) Output C H H L Y L H Hi-Z TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 6388 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0 C to a 70 C b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cann...