IW4024B

TECHNICAL DATA IW4024B 7 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS The IW4024B is ripple-carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the inputpulse line permits unlimited rise and fall times. Operating Voltage Range: 3.0 to 18 V Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION IW4024BN Plastic IW4024BD SOIC TA = -55° to 125° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Inputs Clock Reset L Output Output state No change Advance to next state All Outputs are low w w w .d h s a t a ee . u t4 m o c L X H PIN 14 =VCC PIN 7 = GND PIN 8,10,13 = NO CONNECTION X=don’t care 1 www.DataSheet4U.com IW4024B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Val...