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IN74HC574A Dataheets PDF



Part Number IN74HC574A
Manufacturers IK Semiconductor
Logo IK Semiconductor
Description Octal D-Type Flip-Flop
Datasheet IN74HC574A DatasheetIN74HC574A Datasheet (PDF)

TECHNICAL DATA IN74HC574A Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS N SUFFIX PLASTIC DIP The IN74HC574A is identical in pinout to the LS/ALS574. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Data meeting the setup time is clocked to the outputs with the rising edge of the Clock. The OE input does not affect the states of the flip-flops, but when OE is high, all device outputs are .

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TECHNICAL DATA IN74HC574A Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS N SUFFIX PLASTIC DIP The IN74HC574A is identical in pinout to the LS/ALS574. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Data meeting the setup time is clocked to the outputs with the rising edge of the Clock. The OE input does not affect the states of the flip-flops, but when OE is high, all device outputs are forced to the high-impedance state; thus, data may be stored even when the outputs are not enabled. • • • • Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices 20 1 20 1 DW SUFFIX SOIC ORDERING INFORMATION IN74HC574AN IN74HC574ADW Plastic DIP SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM OE D0 D1 D0 D1 D2 DATA INPUTS D3 D4 D5 D6 D7 CLOCK 2 3 4 5 6 7 8 9 11 19 18 17 16 15 14 13 12 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 NONINVERTING OUTPUTS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 V CC Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 CLOCK D2 D3 D4 D5 D6 D7 GND FUNCTION TABLE Inputs Output D H L L,H, X X X Q H L no change Z OE L PIN 20=VCC PIN 10 = GND Clock 1 OE w w w .d a t a e h s 4 t e c . u om L L H H= high level L = low level X = don’t care Z = high impedance 1 www.DataSheet4U.com IN74HC574A MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1.5 mm from Case for 4 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±35 ±75 750 500 -65 to +150 260 Unit V V V mA mA mA mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA tr, tf Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1) VCC =2.0 V VCC =4.5 V VCC =6.0 V Min 2.0 0 -55 0 0 0 Max 6.0 VCC +125 1000 500 400 Unit V V °C ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74HC574A DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) VC C Guaranteed Limit 25 °C to -55°C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.98 5.48 0.1 0.1 0.1 0.26 0.26 ±0.1 ±0.5 ≤85 °C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 ±1.0 ±5.0 ≤125 °C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 ±1.0 ±10 µA µA V Unit V Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low -Level Input Voltage Minimum High-Level Output Voltage Test Conditions VOUT ≥ VCC-0.1 V ⎢IOUT⎢≤ 20 µA VOUT⎢ ≤ 0.1 V ⎢IOUT⎢ ≤ 20 µA VIN=VIH ⎢IOUT⎢ ≤ 20 µA VIN=VIH ⎢IOUT⎢ ≤ 6.0 mA ⎢IOUT⎢ ≤ 7.8 mA V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 VIL V VOH V VOL Maximum Low-Level Output Voltage VIN= VIL ⎢IOUT⎢ ≤ 20 µA VIN= VIL ⎢IOUT⎢ ≤ 6.0 mA ⎢IOUT⎢ ≤7.8 mA IIN IOZ Maximum Input Leakage Current Maximum Three State Leakage Current VIN=VCC or GND Output in High-Impedance State VIN =VIH VOUT= VCC or GND VIN=VCC or GND IOUT=0µA ICC Maximum Quiescent Supply Current (per Package) 6.0 4.0 40 160 µA 3 IN74HC574A AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=6.0 ns) VCC Symbol fmax Parameter Maximum Clock Frequency (50% Duty Cycle) (Figures 1 and 4) Maximum Propagation Delay, Clock to Q (Figures 1 and 4) Maximum Propagation Delay, Output Enable to Q (Figures 2 and 5) Maximum Propagation Delay, Output Enable to Q (Figures 2 and 5) Maximum Output Transition Time, Any Output (Figures 1 and 4) Maximum Input Capacitance Maximum Three-State Output Capacitance (Output in High-Impedance State) Power Dissipation Capacitance (Per Enabled Output) CPD Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Guaranteed Limit 25 °C to -55°C 6.0 30 35 160 32 27 150 30 26 140 28 24 60 12 10 10 15 ≤85°C 4.8 24 28 200 40 34 190 38 33 175 35 30 75 15 13 10 .


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