CMOS Digital Line Memory
CXD3122R (1/2) IL08
C-MOS DIGITAL LINE MEMORY
—TOP VIEW— 36 35 34 33 32 31 30 29 28 27 26 25
1 2 DIN0 DIN1 DIN2 DIN3 DI...
Description
CXD3122R (1/2) IL08
C-MOS DIGITAL LINE MEMORY
—TOP VIEW— 36 35 34 33 32 31 30 29 28 27 26 25
1 2 DIN0 DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 DIN8 DIN9 DOT0 DOT1 DOT2 DOT3 DOT4 DOT5 DOT6 DOT7 DOT8 DOT9 36 35 34 33 32 31 29 28 27 26
GND
3
GND
37 38 39 40 41 42 43 44 45 46 47 48
NC
NC VDD (+3.0 to +5.5 V) VDD (+3.0 to +5.5 V) NC NC NC NC
24 23 22 21 20 19 18 17 16 15 14 13
4 5 7 8 9 10 11
12
COMP
21 20 18
PSW0 PSW1 PSW2 PSW3 PSW4 PSW5 PSW6 PSW7
1 2 3 4 5 6 7 8 9 10 11 12
17 16 15 14
(VDD = +3.3 to +5.5 V) PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 I/O I I I I I — I I I I I I I I I I I I — I I I I I SIGNAL DIN0 DIN1 DIN2 DIN3 DIN4 GND DIN5 DIN6 DIN7 DIN8 DIN9 COMP PSW7 PSW6 PSW5 PSW4 PSW3 PSW2 VDD PSW1 PSW0 PSB2 PSB1 PSB0 PIN NO. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 I/O I O O O O — O O O O O O I — I I — I — — — — — I SIGNAL
13
OEN
DOT9 DOT8 DOT7 DOT6 GND DOT5 DOT4 DOT3 DOT2 DOT1 DOT0 STB NC AEN NTSC/PAL NC CLK VDD NC NC NC NC TEST
24 23 22 PSB0 PSB1 PSB2
39 40 42 48
AEN NTSC/PAL CLK TEST OEN 25
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37
STB
CXD3122R (2/2) INPUT AEN CLK COM DIN0 - DIN9 NTSC/PAL OEN PSB0 - PSB2 PSW0 - PSW7 STB TEST
: : : : : : : : : :
AMOUNT OF DELAY SELECT CLOCK COMPATIBILITY SELECT DATA AMOUNT OF DELAY FOR NTSC/PAL/SECAM SELECT OUTPUT ENABLE NUMBER OF SMALL DELAY SETTING NUMBER OF DELAY SETTING STANDBY TEST
OUTPUT DOT0 - DOT9 : DATA
OEN PSB0 - PSB2
25 22...
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