IN74LV573

TECHNICAL DATA Octal D-type transparent latch (3-State) The 74LV573 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT573. The 74LV573 is an octal D-type transparent latch featuring separate Dtype inputs for each latch and 3-State outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all internal latches. The ‘573’ consists of eight D-type transparent latches with 3-State true outputs. When LE is HIGH, data at the D n inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the eight latches are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFFstate. Operation of the OE input does not affect the state of the latches. The ‘573’ is functionally identical to the ‘563’ and the ‘373’, but the ‘563’ has inverted outputs and the ‘373’ has a different pin arrangement. Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS Supply voltage range: 1.0 to 5.5 V Low input current: 1.0 µА; 0.1 µА at Т = 25 °С High Noise Immunity Characteristic of CMOS Devices IN74LV573 N SUFFIX PLASTIC DIP 20 1 20 1 DW SUFFIX SO ORDERING INFORMATION IN74LV573N Plastic DIP IN74LV57...