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LH75401 Dataheets PDF



Part Number LH75401
Manufacturers Sharp
Logo Sharp
Description (LH75400/01/10/11) System-on-Chip Preliminary User Guide
Datasheet LH75401 DatasheetLH75401 Datasheet (PDF)

LH75400/01/10/11 System-on-Chip Preliminary User’s Guide 12/8/03 Specifications are subject to change without notice. Suggested applications (if any) are for standard use; See Important Restrictions for limitations on special applications. See Limited Warranty for Sharp’s product warranty. The Limited Warranty is in lieu, and exclusive of, all other warranties, express or implied. ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR USE AND FITNESS FOR A.

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LH75400/01/10/11 System-on-Chip Preliminary User’s Guide 12/8/03 Specifications are subject to change without notice. Suggested applications (if any) are for standard use; See Important Restrictions for limitations on special applications. See Limited Warranty for Sharp’s product warranty. The Limited Warranty is in lieu, and exclusive of, all other warranties, express or implied. ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR USE AND FITNESS FOR A PARTICULAR PURPOSE, ARE SPECIFICALLY EXCLUDED. In no event will Sharp be liable, or in any way responsible, for any incidental or consequential economic or property damage. BlueStreak is a trademark (pending) of SHARP Microelectronics of the Americas ARM7TDMI-S is a trademark of Advanced RISC Machines, United Kingdom. Motorola SPI is a trademark of Motorola, Inc. National Semiconductor Microwire is a trademark of National Semiconductor Corporation LH75400/01/10/11 System-on-Chip Preliminary User’s Guide Produced by the SHARP Microelectronics of the Americas Technical Publication Group. © 2003 Copyright SHARP Microelectronics of the Americas. Printed and Bound in USA. Reference No. SMA02058 Content Revisions This document contains the following changes to content, causing it to differ from previous versions. Record of Revisions DATE PAGE SECTION, TABLE, NO. OR ILLUSTRATION 1.5 1-7 6-2 6-4 7-13+ 9-4 9-7 9-9 9-13 9-14 9-15 11-15-03 9-18 9-20 9-20 1.5.1 1.7 Table 6-1 Table 6-4 Register Bit Fields 9.2.2 Table 9-3 Table 9-10 Tables 9-18, 19 Tables 9-20, 21 Tables 9-22, 23 Tables 9-30, 31 Tables 9-32, 33 Table 9-32 SUMMARY OF CHANGES Pull-up resistor value of 10 KΩ specified for LINREGEN. Text corrected to reflect connectable crystal range of 14 - 20 MHz, plus frequency yield of PLL. Numbers in Table heads and Notes clarified. ‘HR-TFT Controller’ replaced with ‘Advanced LCD Interface’ Where Registers contain Read Only and Read/Write bits, Reserved bits now read ‘Write the Reset Value’. Crystal range connectable to XTALIN and XTALOUT clarified. Bits 6:5 corrected to R/W, Write the Reset Value. Bits 15:0 corrected to ‘Do not write any other value to these bits.’ Bits 8:3 corrected to R/W, Write the Reset Value. Bits 15:2 Reset values corrected. Bit 1 corrected to R/W, Write the Reset Value. Bits 15:14 corrected to R/W, Write the Reset Value. Bit 7 corrected to W, Write only 0. Register address space corrected. Rewritten to clarify operation of Advanced LCD Interface, formerly known as the HR-TFT Controller. Old register names are retained as notes. Register functions and formulae are clarified, but there are no changes to actual operation. Caution statement added regarding enabling LCD before initializing buffer space when REMAP = 1. SCR bit description clarified. CPSR Register clarified. UART0 and UART1 DMA capabilities clarified. Bit 5, Interrupt Mask Register is Reserved, R/W, Reset Value 0, Write the Reset Value. Text and formulas clarified. Chapter 13 13-4 18-12 18-16 19-4 23-13 23-26 13.3 18.5.2.1 18.5.2.5 19.2.3 23.3.2.4 23.3.3 12/8/03 i Table of Contents Preface Supplemental Documentation ............................................................................. xxxiii Terms and Conventions ...................................................................................... xxxiii Multiplexed Pins .............................................................................................. xxxiii Pin Names ....................................................................................................... xxxiv Peripheral Devices .......................................................................................... xxxiv Register Names............................................................................................... xxxiv Register Addresses ......................................................................................... xxxiv Register Tables ................................................................................................ xxxv Chapter 1 – Introduction 1.1 Product Overview ............................................................................................. 1-1 1.2 ARM and Thumb State..................................................................................... 1-2 1.3 Bus Architecture ............................................................................................... 1-2 1.4 Operating Modes.............................................................................................. 1-3 1.4.1 Normal Mode ............................................................................................. 1-4 1.4.2 PLL Bypass Mode ..................................................................................... 1-4 1.4.3 Embedded ICE Mode ................................................................................ 1-4 1.5 Power Supplies ................................................................................................ 1-.


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