KM23V8105G

KM23V8105D(G) 8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM FEATURES Switchable organization 1,048,576 x 8(byte mode) 524,288 x 16(word mode) Random access time/Page Access Time 3.3V Operation : 100/30ns(Max.) 3.0V Operation : 120/50ns(Max.) 4 Words / 8 bytes page access Supply voltage : single +3.0V/ single +3.3V Current consumption Operating : 40mA(Max.) Standby : 30µA(Max.) Fully static operation All inputs and outputs TTL compatible Three state outputs Package -. KM23V8105D : 42-DIP-600 -. KM23V8105DG : 44-SOP-600 CMOS MASK ROM GENERAL DESCRIPTION The KM23V8105D(G) is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 1,048,576 x 8 bit(byte mode) or as 524,288 x 16 bit(word mode) depending on BHE voltage level.(See mode selection table) This device includes PAGE read mode function, page read mode allows 4 words(or 8 bytes) of data to read fast in the same page, CE and A2 ~ A18 should not be changed. This device operates with 3.0V or 3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The KM23V8105D is packaged in a 42-DIP and the KM23V8105DG in a 44-SOP. FUNCTIONAL BLOCK DIAGRAM A18 . . . . . . . . A2 A0~A1 A-1 X BUFFERS AND DECODER MEMORY CELL MATRIX (524,288x16/ 1,048,576x8) PIN...