1M x 16 SDRAM
NT56V1616A0T
16Mb: 1Mx16 Synchronous DRAM
w
w
U 4 NT56V1616A0T t DATA SHEET e e 1Mx16 h Synchronous DRAM S a t a REV ...
Description
NT56V1616A0T
16Mb: 1Mx16 Synchronous DRAM
w
w
U 4 NT56V1616A0T t DATA SHEET e e 1Mx16 h Synchronous DRAM S a t a REV 1.2 .D w
August , 2000
.c
m o
REV 1.2 , AUG. 2000
1
©NANYA TECHNOLOGY CORP. NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
www.DataSheet4U.com
NT56V1616A0T
16Mb: 1Mx16 Synchronous DRAM
Revision History
Revision 1.2 ( August, 2000 ) l l l Changed data sheet format Changed package dimension format Changed Item Voltage on Any Pin Relative to Vss Voltage on Vcc Supply Relative to Vss Input Leakage Current Ambient Temperature VIN ,VOUT VCC , VCCQ IIL Ta From -0.5 to Vcc +0.5 (V) -0.5 to 4.5 (V) -10 ~ +10 µA 0~65°C To -1.0 to 4.6 (V) -1.0 to 4.6 (V) -5 ~ +5 µA 0~70°C
Revision 1.1 ( May, 2000 ) l Add Timing waveform chart
Revision 1.0 ( May, 2000 ) l First Version
REV 1.2 , AUG. 2000
2
©NANYA TECHNOLOGY CORP. NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
NT56V1616A0T
16Mb: 1Mx16 Synchronous DRAM
DESCRIPTION
The NTC 16Meg SDRAM is a high-speed CMOS dynamic random-access memory containing 16,777,216 bits. It is internally configured as a dual memory array (512K x 16) with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the two internal banks is organized with 2,048 rows and with either 256 columns by 16 bits. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected loca...
Similar Datasheet