(MC68HC711E Series) M68HC11E Series Programming Reference Guide
Reference Guide
M68HC11ERG/AD Rev. 2, 10/2003 M68HC11E Series Programming Reference Guide
Block Diagram
MODA/ MODB/ LIR...
Description
Reference Guide
M68HC11ERG/AD Rev. 2, 10/2003 M68HC11E Series Programming Reference Guide
Block Diagram
MODA/ MODB/ LIR VSTBY XTAL EXTAL E IRQ XIRQ/VPPE* RESET
OSC MODE CONTROL CLOCK LOGIC PULSE ACCUMULATOR COP PAI OC2 OC3 OC4 OC5/IC4/OC1 IC1 IC2 PERIODIC INTERRUPT IC3
INTERRUPT LOGIC
ROM OR EPROM (SEE TABLE)
TIMER SYSTEM
M68HC11 CPU
EEPROM (SEE TABLE) RAM (SEE TABLE)
R/W AS
BUS EXPANSION ADDRESS
ADDRESS/DATA
SERIAL PERIPHERAL INTERFACE SPI
SERIAL COMMUNICATION INTERFACE SCI
VDD VSS
STRB STRA
SS SCK MOSI MISO
TxD RxD
STROBE AND HANDSHAKE PARALLEL I/O
VRH VRL A/D CONVERTER
CONTROL PORT A PORT B PORT C
CONTROL PORT D PORT E
STRB/R/W
PA7/PAI PA6/OC2/OC1 PA5/OC3/OC1 PA4/OC4/OC1 PA3/OC5/IC4/OC1 PA2/IC1 PA1/IC2 PA0/IC3
PD5/SS PD4/SCK PD3/MOSI PD2/MISO PD1/TxD PD0/RxD
STRA/AS
PB7/ADDR15 PB6/ADDR14 PB5/ADDR13 PB4/ADDR12 PB3/ADDR11 PB2/ADDR10 PB1/ADDR9 PB0/ADDR8
PC7/ADDR7/DATA7 PC6/ADDR6/DATA6 PC5/ADDR5/DATA5 PC4/ADDR4/DATA4 PC3/ADDR3/DATA3 PC2/ADDR2/DATA2 PC1/ADDR1/DATA1 PC0/ADDR0/DATA0
* VPPE applies only to devices with EPROM/OTPROM.
DEVICE MC68HC11E0 MC68HC11E1 MC68HC11E9 MC68HC711E9 MC68HC11E20 MC68HC711E20 MC68HC811E2
RAM 512 512 512 512 768 768 256
ROM — — 12 K — 20 K — —
PE7/AN7 PE6/AN6 PE5/AN5 PE4/AN4 PE3/AN3 PE2/AN2 PE1/AN1 PE0/AN0 EPROM — — — 12 K — 20 K — EEPROM — 512 512 512 512 512 2048
© Motorola, Inc., 2003
M68HC11ERG/AD
Devices Covered in This Reference Guide
Device MC68HC11E0 MC68HC11E1 MC68HC11E9 MC68HC711E9 MC68HC11E20 MC68HC711E20...
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